# Question 3.3: Apply SPICE methods to determine the CE transfer characteris......

Apply SPICE methods to determine the CE transfer characteristics for the generic npn transistor (QNPNG).

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Figure 3-6(a) presents the connection method chosen for determination of the transfer characteristics.    The associated netlist code follows:

 Ex3_3.CIR Vbe 1 0 0V Q 2  1 0 QNPNG Vc    2 0 1V .MODEL QNPNG NPN(Is=10fA Ikf=150mA Isc=10fA Bf=150 + Br=3 Rb=1ohm Rc=1ohm Va=30V Cjc=10pF Cje=15pF) .DC Vbe 0V 2V 0.01V Vc 0V 2V 0.2V .PROBE .END

Execution of 〈Ex3_3.CIR〉 and use of the Probe feature of PSpice yields the desired transfer characteristics displayed by Fig. 3-6(b).

Question: 3.SP.15

## Find the value of the emitter resistor RE that, when added to the Si transistor circuit of Fig. 3-17, would bias for operation about VCEQ = 5 V. Let ICEO = 0, β = 80, RF = 220 kΩ, RC = 2 kΩ, and VCC = 12 V. ...

Application of KVL around the transistor terminals...
Question: 3.SP.14

## For the amplifier of Fig. 3-17, CC = 100 μF, RF = 180 kΩ, RL = 2 kΩ, RS = 100 kΩ, VCC = 12 V, and vS = 4 sin(20 × 10³πt) V. The transistor is described by the default npn model of Example 3.2. Use SPICE methods to (a) determine the quiescent values (IBQ, ICQ, VBEQ, VCEQ) and (b) plot the input and ...

(a) The netlist code that follows models the circu...
Question: 3.SP.13

## The circuit of Fig. 3-17 uses current- (or shunt-) feedback bias. The Si transistor has ICEO ≈ 0, VCEsat ≈ 0, and hFE = 100. If RC = 2 kΩ and VCC = 12 V, size RF for ideal maximum symmetrical swing (that is, location of the quiescent point such that VCEQ = VCC/2). ...

Application of KVL to the collector-emitter bias c...
Question: 3.SP.12

## Collector characteristics for the Ge transistor of Fig. 3-15 are given in Fig. 3-16. If VEE = 2 V, VCC = 12 V, and RC = 2 kΩ, size RE so that VCEQ = -6.4 V. ...

We construct, on Fig. 3-16, a dc load line having ...
Question: 3.SP.10

## The Si transistor of Fig. 3-14 is biased for constant base current. If β = 80, VCEQ = 8 V, RC = 3 kΩ, and VCC = 15 V, find (a) ICQ and (b) the required value of RB. (c) Find RB if the transistor is a Ge device. ...

(a) By KVL around the collector-emitter circuit, [...
Question: 3.8

## The signal source switch of Fig. 3-9(a) is closed, and the transistor base current becomes iB = IBQ + ib = 40 + 20 sin ωt μA  The collector characteristics of the transistor are those displayed in Fig. 3-9(b). If VCC = 12 V and Rdc = 1 kΩ, graphically determine (a) ICQ and VCEQ, (b) ic and vce, and ...

(a)   The dc load line has ordinate intercept [lat...
Question: 3.7

## For the transistor circuit of Fig. 3-8(a), R1 = 1 kΩ, R2 = 20 kΩ, RC = 3 kΩ, RE = 10 Ω, and VCC = 15 V. If the transistor is the generic npn transistor of Example 3.3, use SPICE methods to determine the quiescent values IBQ, VBEQ, ICQ, and VCEQ. ...

The netlist code below models the circuit. EX3_...
Question: 3.SP.28

## In the circuit of Fig. 3-8(a), RC = 300 Ω, RE = 200 Ω, R1 = 2 kΩ, R2 = 15 kΩ, VCC = 15 V, and β =  110 for the Si transistor. Assume that ICQ ≈ IEQ and VCEsat ≈ 0. Find the maximum symmetrical swing in collector current (a) if an ac base current is injected, and (b) if VCC is changed to 10 V but ...

(a)  From (3.5) and (3.7), I_{CQ} ≈ I_{EQ} ...
Question: 3.SP.27

## In the circuit of Fig. 3-10(a), the transistor is a Si device, RE = 200 Ω, R2 = 10R1 = 10 kΩ, RL = RC = 2 kΩ, β = 100, and VCC = 15 V. Assume that CC and CE are very large, that VCEsat ≈ 0, and that iC = 0 at cutoff. Find (a) ICQ, (b) VCEQ, (c) the slope of the ac load line, (d) the slope of the dc ...

(a)   Equations (3.5) and (3.7), give I_{CQ...