Chapter 4

Q. 4.3

For the amplifier of Example 4.2, let v_i = \sin t(ω = 1 rad/s) and C_S → ∞.   Graphically determine v_{ds} and i_d.


Verified Solution

Since C_S appears as a short to ac signals, an ac load line must be added to Fig. 4-6(b), passing through the Q point and intersecting the v_{DS} axis at
V_{DSQ} + I_{DQ} R_{ac} = 12.5 + (1.5)(3) = 17  \text{V}

We next construct an auxiliary time axis through Q, perpendicular to the ac load line, for the purpose of showing, on additional auxiliary axes as constructed in Fig. 4-6(b), the excursions of i_d and v_{ds} as v_{gs} = v_i swings ±1  \text{V} along the ac load line.   Note the distortion in both signals, introduced by the square-law behavior of the JFET characteristics.