# Question 4.SP.18: For the series-connected identical JFETs of Fig. 4-23, IDSS ......

For the series-connected identical JFETs of Fig. 4-23, $I_{DSS} = 8 \text{mA}$ and $V_{p0} = 4 \text{V}$.     If $V_{DD} = 15 \text{V}, R_D = 5 kΩ, R_S = 2 kΩ,$ and $R_G = 1 MΩ$,   find     (a) $V_{DSQ1}$,    (b) $I_{DQ1}$,     (c) $V_{GSQ1}$,     (d) $V_{GSQ2}$, and    (e) $V_{DSQ2}$.

Step-by-Step
The 'Blue Check Mark' means that this solution was answered by an expert.

(a) By KVL,
$V_{GSQ1} = V_{GSQ2} + V_{DSQ1}$           (1)

But, since $I_{DQ1} ≡ I_{DQ2}$, (4.2) leads to
$i_D = I_{DSS} \left( 1 + \frac{v_{GS}}{V_{p0}} \right)^2$              (4.2)
$I_{DSS} \left(1 + \frac{V_{GSQ1}}{V_{p0}} \right)^2 = I_{DSS} \left(1 + \frac{V_{GSQ2}}{V_{p0}} \right)^2$

or,          $V_{GSQ1} = V_{GSQ2}$           (2)

Substitution of (2) into (1) yields $V_{DSQ1} = 0$.

(b) With negligible gate current, KVL applied around the lower gate-source loop requires that $V_{GSQ1} = -I_{DQ1}R_S$.    Substituting into (4.2) and rearranging now give a quadratic in $I_{DQ1}$:
$I^2_{DQ1} – \left(\frac{V_{p0}}{R_S}\right)^2 \left(\frac{1}{I_{DSS}} + \frac{2R_S}{V_{p0}} \right) I_{DQ1} + \left(\frac{V_{p0}}{R_S}\right)^2 = 0$        (3)

Substitution of known values gives
$I^2_{DQ1} – 4.5 × 10^{-3}I_{DQ1} + 4 × 10^{-6} = 0$

from which we obtain $I_{DQ1} = 3.28 \text{mA}$ and $1.22 \text{mA}$.    The value $I_{DQ1} = 3.28 \text{mA}$ would result in $V_{GSQ1} < -V_{p0}$, so that value is extraneous.    Hence, $I_{DQ1} = 1.22 \text{mA}$.

(c)          $V_{GSQ1} = -I_{DQ1}R_S = -(1.22 × 10^{-3})(2 × 10^{3}) = -2.44 \text{V}$

(d) From (1) with $V_{DSQ1} = 0$, we have $V_{GSQ2} = V_{GSQ1} = -2.44 \text{V}$.

(e) By KVL,
$V _{DSQ2} = V_{DD} – V_{DSQ1} – I_{DQ1}(R_S + R_D) = 15 – 0 – (1.22 × 10^{-3})(2 × 10^{3} + 5 × 10^{3}) = 6.46 \text{V}$

Question: 4.SP.19

## Identical JFETs characterized by iG = 0,  IDSS = 10 mA, and Vp0 = 4 V are connected as shown in Fig. 4-24. Let R_D = 1 kΩ, RS = 2 kΩ, and VDD = 15 V, and find (a) VGSQ1, (b) IDQ2, (c) VGSQ2, (d) VDSQ1, and (e) VDSQ2. ...

(a)   With negligible gate current, (4.2) gives [l...
Question: 4.SP.17

## The differential amplifier of Fig. 4-22 includes identical JFETs with IDSS = 10 mA and Vp0 = 4 V. Let VDD = 15 V, VSS = 5 V, and RS = 3 kΩ. If the JFETs are described by (4.2), find the value of RD required to bias the amplifier such that VDSQ1 = VDSQ2 = 7 V. ...

By symmetry, $I_{DQ1} = I_{DQ2}$. KCL...
Question: 4.SP.16

## Find the equivalent of the two identical n-channel JFETs connected in parallel in Fig. 4-21. ...

Assume the devices are described by (4.2); then [l...
Question: 4.SP.25

## The amplifier of Example 4.7 has plate current iP = IP + ip = 8 + cos ωt mA  Determine (a) the power delivered by the plate supply voltage VPP, (b) the average power delivered to the load RL, and (c) the average power dissipated by the plate of the triode. (d) If the tube has a plate rating of 2 W ...

(a)   The power supplied by the source V_{P...
Question: 4.SP.20

## Fixed bias can also be utilized for the enhancement-mode MOSFET, as is illustrated by the circuit of Fig. 4-25. The MOSFET is described by the drain characteristic of Fig. 4-9. Let R1 = 60 kΩ, R2 = 40 kΩ, RD = 3 kΩ, RL = 1 kΩ, VDD = 15 V, and CC → ∞. (a) Find VGSQ. (b) Graphically determine VDSQ ...

(a)  Assume $i_G = 0$. Then, by (4.3)...
Question: 4.SP.13

## A p-channel MOSFET operating in the enhancement mode is characterized by VT = -3 V and IDQ = -8 mA when VGSQ = -4.5 V. Find (a) VGSQ if IDQ = -16 mA and (b) IDQ if VGSQ = -5 V. ...

(a)   Using the given data in (4.6) leads to [late...
Question: 4.SP.12

## For the n-channel enhancement-mode MOSFET of Fig. 4-18, gate current is negligible, IDon = 10 mA, and VT = 4 V. If RS = 0, R1 = 50 kΩ, VDD = 15 V, VGSQ = 3 V, and VDSQ = 9 V, determine the values of (a) R1 and (b) RD. ...

(a)    Since i_G = 0, V_{GSQ} = V_{GG}[/lat...
Question: 4.SP.11

## The n-channel enhancement-mode MOSFET of Fig. 4-18 is characterized by VT = 4 V and IDon = 10 mA. Assume negligible gate current, R1 = 50 kΩ, R2 = 0.4 MΩ, RS = 0, RD = 2 kΩ, and VDD = 15 V. Find (a) VGSQ, (b) IDQ, and (c) VDSQ. ...

(a)    With negligible gate current, (4.3) leads t...
Question: 4.SP.10

## Gate current is negligible for the p-channel JFET of Fig. 4-17. If VDD = -20 V, IDSS = -10 mA, IDQ = -8 mA, Vp0 = -4 V, RS = 0, and RD = 1.5 kΩ, find (a) VGG and (b) VDSQ. ...

(a)    Solving (4.2) for $v_{GS}$ and...