In the circuit of Fig. 3-10(*a*), the transistor is a Si device, R_E = 200 Ω, R_2 = 10R_1 = 10 kΩ, R_L = R_C = 2 kΩ, β = 100, and V_{CC} = 15 \text{V}. Assume that C_C and C_E are very large, that V_{CE\text{sat}} ≈ 0, and that i_C = 0 at cutoff. Find (*a*) I_{CQ}, (*b*) V_{CEQ}, (*c*) the slope of the ac load line, (*d*) the slope of the dc load line, and (*e*) the peak value of undistorted i_L.

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(*a*) Equations (*3.5*) and (*3.7*), give

I_{CQ} ≈ I_{EQ} = \frac{V_{BB} – V_{BEQ}}{R_B/(β + 1) + R_E} (*3.7)
*R_B = \frac{R_1R_2}{R_1 + R_2} \quad V_{BB} = \frac{R_1}{R_1 + R_2}V_{CC} (

so I_{CQ} ≈ \frac{V_{BB} – V_{BEQ}}{R_B/(β + 1) + R_E} = \frac{1.364 – 0.7}{(909/101) + 200} = 3.177 \text{mA}

(*b*) KVL around the collector-emitter circuit, with I_{CQ} ≈ I_{EQ}, gives

V_{CEQ} = V_{CC} – I_{CQ}(R_E + R_c) = 15 – (3.177 × 10^{-3})(2.2 × 10^3) = 8.01 \text{V}

(*c*) \text{Slope} = \frac{1}{R_{ac}} = \frac{1}{R_C} + \frac{1}{R_L} = 2 \frac{1}{2 × 10^3} = 1 \text{mS}

(*d*) \text{Slope} = \frac{1}{R_{dc}} = \frac{1}{R_C + R_E} = \frac{1}{2.2 × 10^3} = 0.454 \text{mS}

(*e*) From (*3.14*), the ac load line intersects the v_{CE} axis at

v_{CE \max} = V_{CEQ} + I_{CQ}R_{ac} = 8.01 + (3.177 × 10^{-3})(1 × 10^3) = 11.187 \text{V}

Since v_{CE \max} < 2 V_{CEQ}, cutoff occurs before saturation and thus sets V_{cem}. With the large capacitors appearing as ac shorts,

i_L = \frac{v_L}{R_L} = \frac{v_{ce}}{R_L}

or, in terms of peak values,

I_{Lm} = \frac{V_{cem}}{R_L} = \frac{v_{CE \max} – V_{CEQ}}{R_L} = \frac{11.187 – 8.01}{2 × 10^3} = 1.588 \text{mA}

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