If the total distributed gate resistance is R_G, then from Fig. 7.24, the output noise voltage due to R_G is given by

\overline{V_{n, \text { out }}^2}=4 k T \frac{R_G}{3}\left(g_m r_O\right)^2                                                    (7.32)

An important observation here is that, for the gate resistance noise to be negligible, we must ensure that (7.32) is much less than (7.30), and thus

\overline{V_n^2}=\left(4 k T \gamma g_m\right) r_O^2                               (7.30)

\frac{R_G}{3} \ll \frac{\gamma}{g_m}                               (7.33)

The number of gate fingers is chosen large enough to guarantee this condition.