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## Q. 3.6

Objective: Design a circuit with a p-channel MOSFET that is biased with both negative and positive supply voltages and that contains a source resistor $R_{S}$ to meet a set of specifications.

Specifications: The circuit to be designed is shown in Figure 3.29. Design the circuit such that $I_{DQ} = 100 µA , V_{SDQ} = 3 V$, and $V_{RS} = 0.8 V$. Note that $V_{RS}$ is the voltage across the source resistor $R_{S}$ . The value of the larger bias resistor, either $R_{1}$ or $R_{2}$, is to be 200 kΩ.
Choices: A transistor with nominal parameter values of $K_{p} = 100 µA/V^{2}$ and $V_{T P} = −0.4 V$ is available. The conduction parameter may vary by ±5 percent.

## Verified Solution

Assuming that the transistor is biased in the saturation region, we have $I_{DQ} = K_{p}(V_{SG} + V_{T P})^{2}$ . Solving for the source-to-gate voltage, we find the required value of source-to-gate voltage to be
$V_{SG} = \sqrt{\frac{I_{DQ}}{K_{p}}} – V_{T P} = \sqrt{\frac{100}{100}} − (−0.4)$
or
$V_{SG} = 1.4 V$
We may note that the design value of
$V_{SDQ} = 3 V \gt V_{SDQ} (sat) = V_{SGQ} + V_{T P} = 1.4 − 0.4 = 1 V$
so that the transistor will be biased in the saturation region.
The voltage at the gate with respect to ground potential is found to be
$V_{G} = V^{+} − V_{RS} − V_{SG} = 2.5 − 0.8 − 1.4 = 0.3 V$
With $V_{G} \gt 0$, the resistor $R_{2}$ will be the larger of the two bias resistors, so set $R_{2} = 200 k\Omega$. The current through $R_{2}$ is then
$I_{Bias} = \frac{V_{G} − V^{−}}{R_{2}} = \frac{0.3 − (−2.5)}{200} = 0.014 mA$
Since the current through $R_{1}$ is the same, we can find the value of $R_{1}$ to be
$R_{1} = \frac{V^{+} − V_{G}}{I_{Bias}} = \frac{2.5 − 0.3}{0.014}$
which yields
$R_{1} = 157 k \Omega$

The source resistor value is found from
$R_{S} = \frac{V_{RS}}{I_{DQ}} = \frac{0.8}{0.1}$
or
$R_{S} = 8 k\Omega$
The voltage at the drain terminal is
$V_{D} = V^{+} − V_{RS} − V_{SD} = 2.5 − 0.8 − 3 = −1.3 V$
Then the drain resistor value is found as
$R_{D} = \frac{V_{D} − V^{−}}{I_{DQ}} = \frac{−1.3 − (−2.5)}{0.1}$
or
$R_{D} = 12 k \Omega$
Trade-offs: If the conduction parameter $K_{p}$ varies by ±5%, the quiescent drain current $I_{DQ}$ and the source-to-drain voltage $V_{SDQ}$ will change. Using the resistor values found in the previous design, we find the following:

 $K_{p}$ $V_{SGQ}$ $I_{DQ}$ $V_{SDQ}$ 95 µA/V² 1.416 V 98.0 µA 3.04 V 105µA/V² 1.385 V 101.9 µA 2.962 V ±5% ±1.14% ±2% ±1.33%

Comment: We may note that the variation in the Q-point values is smaller that the variation in $K_{p}$. Including the source resistor $R_{S}$ tends to stabilize the Q-point.