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## Q. 3.18

Objective: Design the biasing of the cascode circuit to meet specific requirements.

For the circuit shown in Figure 3.53, the transistor parameters are: $V_{T N1} = V_{T N2} = 1.2 V, K_{n1} = K_{n2} = 0.8 mA/V²$ , and $λ_{1} = λ_{2} = 0$. Let $R_{1} + R_{2} + R_{3} = 300 kΩ$ and $R_{S} = 10 kΩ$. Design the circuit such that $I_{DQ} = 0.4 mA$ and $V_{DSQ1} = V_{DSQ2} = 2.5 V$

## Verified Solution

The dc voltage at the source of $M_{1}$ is
$V_{S1} = I_{DQ} R_{S} − 5 = (0.4)(10) − 5 = −1 V$
Since $M_{1}$ and $M_{2}$ are identical transistors, and since the same current exists in the two transistors, the gate-to-source voltage is the same for both devices. We have
$I_{D} = K_{n}(V_{GS} − V_{T N})^{2}$
or
$0.4 = 0.8(V_{GS} − 1.2)^{2}$
which yields
$V_{GS} = 1.907 V$
Then,
$V_{G1} =\left( \frac{R_{3}}{R_{1} + R_{2} + R_{3}} \right) (5) = V_{GS} + V_{S1}$

or
$\left( \frac{R_{3}}{300} \right) (5) = 1.907 − 1 = 0.907$
which yields
$R_{3} = 54.4 k\Omega$
The voltage at the source of $M_{2}$ is
$V_{S2} = V_{DSQ1} + V_{S1} = 2.5 − 1 = 1.5 V$
Then,
$V_{G2} = \left( \frac{R_{2} + R_{3}}{R_{1} + R_{2} + R_{3}} \right) (5) = V_{GS} + V_{S2}$
or

$\left( \frac{R_{2} + R_{3}}{300} \right) (5) = 1.907 + 1.5 = 3.407 V$
which yields
$R_{2} + R_{3} = 204.4 k \Omega$
and
$R_{2} = 150 k\Omega$
Therefore
$R_{1} = 95.6 k \Omega$
The voltage at the drain of $M_{2}$ is
$V_{D2} = V_{DSQ2} + V_{S2} = 2.5 + 1.5 = 4 V$
The drain resistor is therefore
$R_{D} = \frac{5 − V_{D2}}{I_{DQ}} = \frac{5 − 4}{0.4} = 2.5 k \Omega$
Comment: Since $V_{DS} = 2.5 V \gt V_{GS} − V_{T N} = 1.91 − 1.2 = 0.71 V$, each transistor is biased in the saturation region.