Objective: Determine the change in the high output voltage of an NMOS inverter with enhancement load, taking the body effect into account.

Consider the NMOS inverter with enhancement load in Figure 16.9(a). The transistor parameters are $V_{T N DO} = V_{T N LO} = 0.5 V$ and $K_{D}/K_{L} = 16$ . Assume the inverter is biased at $V_{DD} = 2.5 V$ , assume the body effect coefficient is $γ = 0.5 V^{1/2}$ , and let $\phi_{f p} = 0.365 V$ .

Question

Objective: Determine the change in the high output voltage of an NMOS inverter with enhancement load, taking the body effect into account.

Consider the NMOS inverter with enhancement load in Figure 16.9(a). The transistor parameters are [latex]V_{T N DO} = V_{T N LO} = 0.5 V[/latex] and [latex]K_{D}/K_{L} = 16[/latex]. Assume the inverter is biased at [latex]V_{DD} = 2.5 V[/latex], assume the body effect coefficient is [latex]γ = 0.5 V^{1/2}[/latex] , and let [latex]\phi_{f p} = 0.365 V[/latex].

Accepted Answer

When [latex]v_{I} \lt V_{T N DO}[/latex] , the driver is cut off and the output goes high. From Equation (16.14(b)), the maximum output voltage is
[latex]v_{O,max} = V_{O H} = V_{DD} − V_{T N L} [/latex]
where [latex]V_{T N L}[/latex] is given by
[latex]V_{T N L} = V_{T N LO} + γ \left[\sqrt{2 \phi_{f p} + V_{SB}} − \sqrt{2\phi_{f p}} \right] [/latex]

From Figure 16.9(a), we see that [latex]V_{SB} = v_{O} [/latex] . Therefore, Equation (16.14(b)) can be written as
[latex]v_{O,max} = V_{DD} − \left\{V_{T N LO} + γ \left[ \sqrt{2\phi_{f p} + v_{O,max}} − \sqrt{2\phi_{f p}} \right] \right\} [/latex]

Defining [latex]v_{O,max} ≡ V_{O H}[/latex] , we have
[latex]V_{O H} − 2.427 = −0.5 \sqrt{0.73 + V_{O H}} [/latex]
Squaring both sides and rearranging terms yields
[latex]V^{2}_{O H} − 5.1044 V_{O H} + 5.7088 = 0[/latex]
Consequently, the maximum output voltage, or the logic 1 level, is
[latex]V_{O H} = 1.655 V[/latex]
Comment: Neglecting the body effect, the logic 1 output level is
[latex]V_{O H} = V_{DD} − V_{T N LO} = 2.5 − 0.5 = 2.0 V[/latex]
The body effect, then, can significantly influence the logic high state of the NMOS inverter with enhancement load. These results also impact the inverter noise margins.
The source and body terminals of the depletion load device in the NMOS inverter shown in Figure 16.9(b) are not at the same potential when the output goes high. However, when the driver is cut off, the drain-to-source voltage of the depletion device must be zero in order that [latex]v_{O,max} = V_{O H} = V_{DD}[/latex] .

Computer Simulation: A computer analysis of the inverters in Figure 16.9 was performed, neglecting the body effect and taking the body effect into account. The parameters are [latex]V_{DD} = 5 V, V_{T N DO} = 0.8 V[/latex] for the driver transistors, [latex]V_{T N LO} = 0.8 V[/latex] for the saturated load transistor, and [latex]V_{T N LO} = −2 V[/latex] for the depletion load transistor.

The body effect coefficient was assumed to be [latex]γ = 0.9 V^{1/2} [/latex].
The body effect changes the voltage transfer characteristics of both the enhancement load and depletion load inverters. Figure 16.10(a) shows the voltage transfer characteristics for the enhancement load inverter. For [latex]v_{I} = 0[/latex], the output voltage is 3.15 V when the body effect is taken into account. This compares to 4.2 V when the body effect is neglected.
Figure 16.10(b) shows the voltage transfer characteristics for the depletion load inverter. The output voltage is 5 V in the high state, which is independent of the body effect. However, the characteristics during the transition region are a function of the body effect.

Question 16.4: Objective: Determine the change in the high output voltage o...

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