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High-Frequency Integrated Circuits [EXP-59039]
64 SOLVED PROBLEMS
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Question: 3.SP.6
(a) Find the equivalent noise parameters of a parallel connected Rf-Cf network connected in series with the signal path. (b) If this network is used as a shunt–shunt feedback, how does this case compare with the situation described of a series R-L circuit connected in shunt–shunt feedback?
Verified Answer:
(a)
R_n =\frac{R_f}{1+(sC_f R_f)^2} ; G_u =...
Question: 7.1
(a) The measured RSOPT of a 3130nm2.5μm HBT (3 emitter stripes, each 130nm wide and 2.5μm long) is 466.6Ω at 6GHz and JOPT = 2mA/μm^2. Find the total emitter length of a SiGe HBT with 130nm emitter width such that its RSOPT=50Ω at 6GHz. Calculate the bias current knowing that the HBT is biased at
Verified Answer:
(a) If, for an HBT with a total emitter length of ...
Question: 4.9
(a) The same NiSi silicide is maintained on the gate and source–drain contact regions as MOSFETs are scaled according to the constant field scaling rules from the 65nm node to the 45nm node. What happens to the sheet resistance of the gate poly? Does it increase, decrease, or remain constant?
Verified Answer:
(a) The gate sheet resistance
R_{S H G}=\rh...
Question: 7.5
60GHz common-gate CMOS LNA design For the 60GHz LNA in Figure 7.26(b), the power supply voltage is 0.6V. The noise parameters of the n-MOSFET in the common-source configuration are listed in the Table 7.5 as a function of frequency. Assume g^′meff = 1.1mS/μm, g^′oeff = 0.11mS/μm, C^′gs = 1fF/μm.
Verified Answer:
(a) We can use the data in the table and the fact ...
Question: 2.7
60GHz line-of-sight link budget Consider a 2m radio link at 60GHz which employs QPSK modulation format and transmits at a data rate of 4Gb/s occupying a bandwidth of 2GHz. Calculate the link margin if the transmitter output power PTX is 0dBm, the receiver noise figure and SNR are 7dB and 14dB,
Verified Answer:
The free-space loss over 2m is
L F S=20 \ti...
Question: 2.10
60GHz OFDM NLOS 1 phased arrays Consider a 10m NLOS link at 60GHz which employs OFDM and 16QAM modulation format and transmits at a data rate of 4Gb/s, occupying a bandwidth of 2GHz. (a)Calculate the link margin if the transmitter consists of a phased array with 32 elements, each element
Verified Answer:
The free-space loss over 10m is
L F S=20 \t...
Question: 5.6
65nm CMOS chain scaling Consider a 6-stage CMOS amplifier chain where each stage has minimum gate length transistors, with W = 20μm and 20 unit fingers, each 1μm wide and contacted on both sides of the gate. RD = 200Ω. Each stage is biased at 0.15mA/μm and the corresponding small signal parameters
Verified Answer:
The low-frequency voltage gain per stage is [latex...
Question: 5.8
65nm CMOS distributed amplifier Consider a lumped 1.2V CS stage with resistive load where W = 180μm and R D = 25Ω. Find the bandwidth extension if a distributed topology is used.
Verified Answer:
(a) For the lumped stage, biasing each transistor ...
Question: 5.7
65nm n-MOS common-source stage with shunt peaking For the circuit in Example 5.6, find the value of the peaking inductor and bandwidth extension if a maximally flat gain response is desired.
Verified Answer:
The load resistance
R_{D}
is [latex...
Question: 7.2
6GHz and 12GHz LNA design in 180nm CMOS You have just been hired as an RF circuit designer by a fabless semiconductor company focusing on developing wireless products over a wide range of frequencies. Your boss has assigned you the task of designing a n-MOS cascode LNA (like the one in Figure
Verified Answer:
Let us start with the
6 \mathrm{GHz}[/latex...
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