Question 8.3: Manually determine the machine code for each memory location...
Manually determine the machine code for each memory location produced by the source code of Example 8.2.What is the value of the label PLUS? (Hint: Use Table 8.1 to determine the op codes for each instruction.)
| Table 8.1. Selected Instructions for the CPU12 (Cont.) | |||||||||||
| Source Form |
Operation | Addr. Mode | Machine Code | Condition Codes | |||||||
| S | X | H | I | N | Z | V | C | ||||
| STOP | Stop Internal Clocks. If S control bit = 1, the STOP instruction is disabled and acts like a NOP | INH | 18 3E | – | – | – | – | – | – | – | – |
| TSTA | Test Accumulator A; (A) − 00 | INH | 97 | – | – | – | – | \updownarrow | \updownarrow | 0 | 0 |
| TSTB | Test Accumulator B; (B) − 00 | INH | D7 | – | – | – | – | \updownarrow | \updownarrow | 0 | 0 |
| S indicates instructions that are intended for two’s complement signed numbers U indicates instructions that are intended for unsigned numbers * For indexed addressing (IDX). Only the first byte of the machine coded is given. An additional one to three bytes are needed. The details are beyond the scope of our discussion. ii 8-bit immediate data dd low byte of a direct address hh ll high and low bytes of an extended address jj kk high and low bytes of 16-bit immediate data rr signed 8-bit offset in branch instruction |
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The assembler ignores the title and other comments. Because of the ORG directive, the machine code is placed in memory starting at location 0300.
A comment has been added to explain each line; however, the assembler does not produce these comments.
Recall that branch instructions use relative addressing. The required offset for the BPL command is not known on the first pass through the source code. However, after the first pass, we see that the location corresponding to the label PLUS is 030A and that an offset of 05 is needed for the BPL command. The END directive does not produce object code.
The memory addresses and their contents are:
| 0300: B6 Op code for LDAA with extended addressing. 0301: 02 High byte of address. 0302: 00 Low byte of address. 0303: 2A Op code for BPL which uses relative addressing. 0304: 05 Offset (On the first pass this value is unknown.) 0305: 41 Op code for COMA which computes one’s complement. 0306: 42 Op code for INCA. 0307: 7A Op code for STAA with extended addressing. 0308: 02 High byte of address. 0309: 00 Low byte of address. 030A: 87 Clear A. 030B: 18 Halt processor. 030C: 3E |