Showing Branch Offset in Machine Language The while loop on pages 92-93 was compiled into this MIPS assembler code: Loop: s11 $t1, $s3, 2 #Temp reg $t1 = 4 * i add $t1, $t1, $s6 #$t1 = address of save[i] 1w $t0, 0($t1) #Temp reg $to = save[i] bne $to, $s5, Exit #go to Exit if save[i] ≠ k addi $s3,

Question

Showing Branch Offset in Machine Language

The while loop on pages 92-93 was compiled into this MIPS assembler code:

Loop: s11 $t1, $s3, 2 #Temp reg $t1 = 4 ∗ i

add $t1, $t1, $s6 #$t1 = address of save[i]
1w $t0, 0($t1) #Temp reg $to = save[i]
bne $to, $s5, Exit #go to Exit if save[i] ≠ k
addi $s3, $s3, 1 # i = i + 1
j Loop #go to Loop

Exit:

If we assume we place the loop starting at location 80000 in memory, what is the MIPS machine code for this loop?

Accepted Answer

The assembled instructions and their addresses are:

Remember that MIPS instructions have byte addresses, so addresses of sequential words differ by 4, the number of bytes in a word. The bne instruction on the fourth line adds 2 words or 8 bytes to the address of the following instruction (80016), specifying the branch destination relative to that following instruction [latex](8 + 80016)[/latex] instead of relative to the branch instruction [latex](12 + 80012)[/latex] or using the full destination address (80024). The jump instruction on the last line does use the full address [latex](20000 ×4 = 80000)[/latex], corresponding to the label Loop.

0	2	9	19	0	0	80000
32	0	9	22	9	0	80004
0			8	9	35	80008
2			21	8	5	80012
1			19	19	8	80016
20000					2	80020
					…	80024

Question 2.10.2: Showing Branch Offset in Machine Language The while loop on ......

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