Question 22.5: Determine the output voltage for the diff-amp seen in Fig. 2......
Determine the output voltage for the diff-amp seen in Fig. 22.12. Verify your hand calculations using SPICE.
The tail current of the diff-amp conducts 20 μA so M1 and M2, when the inputs are equal, each conduct 10 μA. Using the parameters from Table 9.2 and Eq. (22.22), the gain of the diff-amp is
A_d=\frac{\nu_{out}}{\nu_{di}}=\frac{\nu_{out}}{\nu_{i1}-\nu_{i2}}=g_m\cdot (r_{o2}||r_{o4}) (22.22)
A_{d}=g_{m}\cdot(r_{o n}||r_{o p})=(150\times10^{-6})\cdot\left\lgroup\frac{167\cdot333}{167+333}\times10^{3}\right\rgroup =16.7~V/VThis means that the 1 mV AC input will appear as a 16.7 mV AC output. The DC level on the output is VDD – V_{SG}=650\ mV. The output voltage is then
\nu_{o u t}(t)=0.65+(16.7\ m V)\cdot\sin\left(2\pi10M H z\cdot t\right)The simulation results are seen in Fig. 22.13.
Table 9.2 Typical parameters for analog design using the short-channel CMOS process discussed in this book. These parameters are valid only for the device sizes and currents listed.
Short-channel MOSFET parameters for general analog design
VDD = 1 V and a scale factor of 50 nm {scale = 50e-9)
| Parameter | NMOS | PMOS | Comments |
| Bias current, I_D | 10 \mu A | 10 \mu A | Approximate, see Fig. 9.31 |
| W/L | 50/2 | 100/2 | Selected based on I_D\ \text{and}\ V_{o\nu} |
| Actual W/L | 2.5\mu m/100nm | 5\mu m/100nm | L_{min}\ \text{is}\ 50 nm |
| V_{DS,sat}\ \text{and}\ V_{SD,sat} | 50 mV | 50 mV | However, see Fig. 9.32 and
the associated discussion |
| V_{o\nu n}\ \text{and}\ V_{o\nu p} | 70 mV | 70 mV | |
| V_{GS}\ \text{and}\ V_{SG} | 350 mV | 350 mV | No body effect |
| V_{THN}\ \text{and}\ V_{THP} | 280 mV | 280 mV | Typical |
| \partial V_{THN,P}/\partial T | – 0.6 mV/C° | – 0.6 mV/C° | Change with temperature |
| \nu_{satn}\ \text{and}\ \nu_{satp} | 110\times 10^3\ m/s | 90\times 10^3\ m/s | From the BSIM4 model |
| t_{ox} | 14\ \mathring{A} | 14\ \mathring{A} | Tunnel gate current, 5\ A/cm^2 |
| {C}_{o x}^{\prime}=\varepsilon _{ox}/t_{ox} | 25\ fF/\mu m^2 | 25\ fF/\mu m^2 | {C}_{o x}={C}_{o x}^{\prime}WL\cdot (scale)^2 |
| C_{oxn}\ \text{and}\ C_{oxp} | 6.25fF | 12.5fF | PMOS is two times wider |
| C_{gsn}\ \text{and}\ C_{sgp} | 4.17fF | 8.34fF | C_{gs}=\frac{2}{3}C_{ox} |
| C_{gdn}\ \text{and}\ C_{dgp} | 1.56fF | 3.7fF | C_{gd}=CGDO\cdot W\cdot scale |
| g_{mn}\ \text{and}\ g_{mp} | 150\ \mu A/V | 150\ \mu A/V | At\ I_D=10\ \mu A |
| r_{on}\ \text{and}\ r_{op} | 167\ k\Omega | 333\ k\Omega | Approximate at I_D=10\ \mu A |
| g_{mn}r_{on}\ \text{and}\ g_{mp}r_{op} | 25 V/V | 50 V/V | !!Open circuit gain!! |
| \lambda _n\ \text{and}\ \lambda _p | 0.6\ V^{-1} | 0.3\ V^{-1} | L = 2 |
| f_{Tn}\ \text{and}\ f_{Tp} | 6000 MHz | 3000 MHz | Approximate at L = 2 |
