Simulate the operation of the diff-amp in Fig. 22.22 using the parameters from Table 9.1.
Table 9.1 Typical parameters for analog design using the long-channel CMOS process discussed in this book. Note that the parameters may change with temperature or drain-to-source voltage (e.g., Fig. 9.24).
Long-channel MOSFET parameters for general analog design
VDD = 5 V and a scale factor of 1 μm (scale = 1e-6)
Parameter | NMOS | PMOS | Comments |
Bias current, I_D | 20 \mu A | 20 \mu A | Approximate |
W/L | 10/2 | 30/2 | Selected based on I_D\ \text{and}\ V_{DS,sat} |
V_{DS,sat}\ \text{and}\ V_{SD,sat} | 250 mV | 250 mV | For sizes listed |
V_{GS}\ \text{and}\ V_{SG} | 1.05 V | 1.15 V | No body effect |
V_{THN}\ \text{and}\ V_{THP} | 800 mV | 900 mV | Typical |
\partial V_{THN,P}/\partial T | -1\ \text{mV/C°} | -1.4\ \text{mV/C°} | Change with temperature |
KP_n\ \text{and}\ KP_p | 120\ \mu A/V^2 | 40\ \mu A/V^2 | t_{ox}=200\ \mathring{A} |
C_{o x}^{\prime}=\varepsilon _{o x}/t_{o x} | 1.75fF/\mu m^2 | 1.75fF/\mu m^2 | C_{ox}=C_{o x}^{\prime}WL\cdot (scale)^2 |
C_{oxn}\ \text{and}\ C_{oxp} | 35fF | 105fF | PMOS is three times wider |
C_{gsn}\ \text{and}\ C_{sgp} | 23.3fF | 70fF | C_{gs}=\frac{2}{3}C_{ox} |
C_{gdn}\ \text{and}\ C_{dgp} | 2fF | 6fF | C_{gd}=CGDO\cdot W\cdot scale |
g_{mn}\ \text{and}\ g_{mp} | 150\ \mu A/V | 150\ \mu A/V | At\ I_D=20\ \mu A |
r_{on}\ \text{and}\ r_{op} | 5\ M\Omega | 4\ M\Omega | Approximate at I_D=20\ \mu A |
g_{mn}r_{on}\ \text{and}\ g_{mp}r_{op} | 750 V/V | 600 V/V | Open circuit gain |
\lambda _n\ \text{and}\ \lambda _p | 0.01\ V^{-1} | 0.0125\ V^{-1} | At L = 2 |
f_{Tn}\ \text{and}\ f_{Tp} | 900 MHz | 300 MHz | \text{For}\ L=2,f_T\ \text{goes up if}\ L=2 |
The simulation results are seen in Fig. 22.23. Note that when both inputs are at 3.5 V, the output currents are equal. This figure should be to Fig. 22.3.
Note how in Fig. 22.3, the output currents flatten out above a maximum input voltage. Here the current continues to increase.