Question 29.9: Find the output voltage for a 3-bit pipeline DAC for three c......
Find the output voltage for a 3-bit pipeline DAC for three cases: D_A = 001,\ D_B = 110,\ \text{and}\ D_C = 101. Show that the conversion time to perform all three conversions is five clock cycles using the pipeline approach. Assume that V_{REF} = 5 V.
The first stage operates on the LSBs of each word; the second stage operates on the middle bits; and the last stage, the MSBs. Based on the pipeline strategy, once the LSB of the first input word is performed and passed on, the LSB of the second word, D_B, can begin its conversion. Similarly, once the LSB of the second stage is completed and passed on, the LSB of the third word, D_C , can begin. The conversion cycle for all three input words produces the output shown in Fig. 29.20. The items that are in bold are associated with the first input word, D_A , whereas the italicized numbers represent the values associated with D_B and the underlined items, D_C.
The first output of the DAC is not valid until the end of the third clock cycle and should look familiar as the 3-bit DAC output for an input word of D_2D_1D_0 = 001. The following two clock cycles that produce outputs for D_2D_1D_0 equal 110 and 101, respectively.
