A signal varies as v_S(t)=10(1–e^{–100t}) V. Design a comparator circuit that will switch from 0 to 5 V in 2 ms. Use a single OP AMP that has +V_{CC}= + 5 V and – V_{CC} = 0 V.
Determine the voltage of v_S(t), when t = 2 ms, and then design a comparator circuit to switch as specified above.
clear all
vs2ms = 10*(1-exp(-100*2e-3))
vs2ms =
1.8127e+000
We want the comparator circuit to produce 0 V when v_S(t) < 1.8127 V, and to produce 5 V when v_S(t) > 1.8127 V. Using Figure P4-61 as a model, the following design provides one possible solution.
The following output plot shows that the circuit meets the specifications.
Answer:
Presented above.