Question 29.13: Assume that the pipeline converter shown in Fig. 29.30 is a ......
Assume that the pipeline converter shown in Fig. 29.30 is a 3-bit converter. Analyze the conversion process by making a table of the following variables: D_{2}, D_{1}, D_{0}, V_{3}, V_{2} , for v_{IN} = 2, 3, and 4.5 V. Assume that V_{REF}=5\ V, V_{3} is the residue voltage out of the first stage, and V_{2} is the residue voltage out of the second stage.
The output of the first comparator, D_{2}=0, since v_{IN} < 2.5 V. Since D_{2}=0,\ V_{3}=2(2) = 4\ V. Passing this voltage down the pipeline, since V_{3} > 2.5 V, D_{1}=1 and V_{2} becomes
V_{2}=\left(V_{3}-\frac{V_{R E F}}{2}\right)\times2=3\ VThe LSB, D_{0}=1, since V_{2} > 2.5 V, and the digital output corresponding to V_{IN} = 2 V, is D_{2}D_{1} D_{0} = 011. The actual digital outputs are simply the comparator outputs, and the data can be completed as seen in Fig. 29.31.
