Question 29.16: Using a general first-order ΣΔ modulator, assume that the in......

The present integrator output will be equal to the sum of the previous integrator output and the previous integrator input. Therefore, Eq. (29.95) becomes

u(k T)=x(k T-T)-q(k T-T)+u(k T-T)          (29.95)

v_{u}(k T)=\,v_{u}(k T-T\,)\,+\,v_{a}(k T-T)         (29.102)

where

v_{a}(k T)=v_{x}(k T)-v_{q}(k T)          (29.103)

and the quantizing error, Q_{e}(k T), is defined by Eqs. (29.96) and (29.98) as

Q_{e}(k T)=y(k T)-u(k T)           (29.96)

y(k T)=q(k T)            (29.98)

{Q}_{e}(k T)=v_{q}(k T)-v_{u}(k T)            (29.104)

The initial conditions define the values of the variable for k = 0. The output of the integrator is given to be 0.1 V. Thus, the ADC output is low, the DAC output is V_{{{R E F}}}, and the output of the summer, v_{a}(0), is 0.4 – V_{{{R E F}}} = – 0.6 V.

The output for k = 1 begins again with the integrator output. Using Eq. (29.102), v_{ u}(k T) becomes

Since the output of the integrator is negative, the output of the comparator is positive and – V_{{{R E F}}} is subtracted from 0.4 to arrive at the value for v_{a}(T).

Continuing in the same manner and using the previous equations, we can write the voltages for each cycle as seen in Fig. 29.48. After 10 cycles through the modulator, the average value of v_{ q}(k T) becomes,

Notice that the behavior of \overline{{v_{q}(k T)}} swings around the desired value 0.4 V. If we were to continue computing values, as k increases, the amount that differs \overline{{v_{q}(k T)}} from 0.4 V would decrease. Ideally, we could make the deviation of as \overline{{v_{q}(k T)}} small as desired by allowing the modulator to take as many samples as necessary to meet that accuracy.