Question 10.20: LPM Flip-Flop Use the LPM_FF to implement an octal D flip-fl......
LPM Flip-Flop
Use the LPM_FF to implement an octal D flip-flop with synchronous clock and data inputs and an asynchronous clear. Test its operation by producing a set of simulation waveforms that exercise both the synchronous and asynchronous inputs.
Insert the LPM_FF symbol to a new block design file. Use the MegaWizard to make it an octal device by specifying 8 D Flip-Flops. Also add an asynchronous clear input. Attach the inputs and outputs as shown in Figure 10–58.
Several waveforms are made up for the simulation to exercise the features of the LPM_FF (see Figure 10–59). The initial HIGH on aclear resets all eight q outputs to 0’s (00H). The first positive edge clock occurs at 1.0 μs. This stores the 8 bits from the d-inputs (FFH) into the register, which then appear on the q outputs just the way that an individual 7474 D flip-flop would. The same occurs at the 3-, 5-, and 7- μs marks. Then an asynchronous aclear is asserted at 8.0 μs. (It is an active-HIGH signal, but it could have been specified as active-LOW by right-clicking the symbol and modifying its Properties.) This forces the q-outputs to 00H. The next aclear is asserted at 10.5 μs, resetting the q outputs. It is still HIGH beyond the 11- μs positive clock edge. Since aclear has priority, the synchronous operation of loading the d inputs (66H) will not occur.
