Question 10.21: LPM Flip-Flop with Asynchronous Control Use the LPM_FF to im......
LPM Flip-Flop with Asynchronous Control
Use the LPM_FF to implement an octal D flip-flop with asynchronous clear, set, and load. Include an enable to control the clock. Test its operation by producing a set of simulation waveforms that exercise both the asynchronous and synchronous inputs.
Insert the LPM_FF symbol to a block design file as shown in Figure 10–60. Use the MegaWizard to make it an octal device by specifying 8 D Flip-Flops with a clock enable. Also add asynchronous clear, load, and set inputs. Connect all of the inputs and outputs as shown.
The simulation file in Figure 10–61 is designed to exercise all of the synchronous and asynchronous inputs. As specified in the Help screen, the enable line must be HIGH to enable the clock to be read. (Notice that the positive clock transition at 5.0 μs is ignored because enable is LOW.)
The q outputs initially start out at FFH because the asynchronous set (aset) is asserted HIGH right at the beginning of the waveforms. After that, the q outputs take on the value of the d inputs at each positive clock edge. At 8.5 μs the aload signal is asserted. This asynchronously loads the d inputs (33H) into the device regardless of the state of the clock. The last asynchronous operation occurs at 13.75 μs, where aclear resets the q outputs to 00H.
