Design a four-line to two-line priority encoder with active HIGH inputs and outputs, with priority assigned to the higher-order data input line.

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The truth table for such a priority encoder is given in Table 8.10, with [latex]D_0, D_1, D_2[/latex] and [latex]D_3[/latex] as data
inputs and [latex]X[/latex] and [latex]Y[/latex] as outputs.

The Boolean expressions for the two output lines [latex]X[/latex] and[latex] Y[/latex] are given by the equations

[latex]X=D_{2}.\overline{D_{3} }+ D_{3}=D_{2}+ D_{3}[/latex] (8.5)

[latex]Y=D_{1}.\overline{D_{2} }.\overline{D_{3} }+ D_{3}=D_{1}.\overline{D_{2}}+ D_{3}[/latex] (8.6)

Figure 8.17 shows the logic diagram that implements the Boolean functions given in equations (8.5) and (8.6).

Table 8.10 Example 8.5.
[latex]Y[/latex]	[latex]X[/latex]	[latex]D_3[/latex]	[latex]D_2[/latex]	[latex]D_1[/latex]	[latex]D_0[/latex]
0	0	0	0	0	1
1	0	0	0	1	[latex]X[/latex]
0	1	0	1	[latex]X[/latex]	[latex]X[/latex]
1	1	1	[latex]X[/latex]	[latex]X[/latex]	[latex]X[/latex]

Table 8.10 Example 8.5.
$Y$	$X$	$D_3$	$D_2$	$D_1$	$D_0$
0	0	0	0	0	1
1	0	0	0	1	$X$
0	1	0	1	$X$	$X$
1	1	1	$X$	$X$	$X$

Question 8.5: Design a four-line to two-line priority encoder with active ...

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