(a) Successive approximation
(b) Dual-slope
(b) Parallel comparator Maximum conversion time for 8 bit ADC in clock cycles
(1) 1 (2) 2
(3) 16 (4) 256
(5) 512
(a) Successive approximation
(b) Dual-slope
(b) Parallel comparator Maximum conversion time for 8 bit ADC in clock cycles
(1) 1 (2) 2
(3) 16 (4) 256
(5) 512