The circuit shown in the figure is a 4-bit DAC The input bits 0 and 1 are represented by 0 and 5 V, respectively. The OP AMP is ideal, but all the resistances and the 5 V inputs have a tolerance of ± 10%. The specification (rounded to the nearest multiple of 5%) for the tolerance of the DAC is

(a) ±35% (b) ±20%

(c) ±10% (d) ±5%

Question

The circuit shown in the figure is a 4-bit DAC The input bits 0 and 1 are represented by 0 and 5 V, respectively. The OP AMP is ideal, but all the resistances and the 5 V inputs have a tolerance of ± 10%. The specification (rounded to the nearest multiple of 5%) for the tolerance of the DAC is

(a) ±35% (b) ±20%

(c) ±10% (d) ±5%

(a) ±35% (b) ±20%

(c) ±10% (d) ±5%

Accepted Answer

(4 bit DAC)
5V ilp
(0 → 0)
(1 → 5V)

[latex]\begin{aligned}V_{0} &=\left[\frac{ u _{1}}{1 R}+\frac{V_{2}}{2 R}+\frac{V_{3}}{4 R}+\frac{V 4}{8 R} ight]^{R} \&=-\left(V_{1}+\frac{V_{2}}{2}+\frac{V_{3}}{4}+\frac{V_{4}}{8} ight)\end{aligned}[/latex]

5V input, R → 10% tolerance
⇒ [latex]V_{0}[/latex] = -5 [1 + 0.5 + 0.25 + 0.125] = -9.375
([latex]V_{0 \max }[/latex] due to tolerance)
Tolerance of DAC:

[latex]\begin{aligned}V_{D} &=\frac{-110}{90} imes\left(5.5+\frac{5.5}{2}+\frac{5.5}{4}+\frac{5.5}{8} ight) \&=\frac{-11}{9} imes 5.5=-12.604\end{aligned}[/latex]

T = 34.44 Ω 350/0.
Hence, the correct option is (a).

Question 8.2.8: The circuit shown in the figure is a 4-bit DAC The input bit...

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