Question 10.DA.5: AN NMOS CURRENT SOURCE Objective: Design an NMOS current sou...
AN NMOS CURRENT SOURCE
Objective: Design an NMOS current source circuit to provide a specified bias current and output resistance.
Specifications: Design an NMOS current source to provide a bias current of I_{Q} = 100 µA and an output resistance greater than 20 MΩ. The reference current is to be I_{REF} = 150 µA. The circuit is to be biased at ±3.3 V and the voltage at the drain of the current source transistor is to be no smaller than −2.2 V.
Design Approach: A simple two-transistor current source would yield an output resistance of
R_{o} = r_{o} = \frac{1}{λ I_{Q}} = \frac{1}{(0.01)(0.1)} ⇒ 1 MΩ
Therefore, to obtain a larger output resistance, a cascode current source is required. The basic circuit is shown in Figure 10.42. The transistor M5 may actually need to be two or more transistors in series.
Choices: NMOS transistors are available with the following parameters: V_{T N} = 0.5 V, k_{n}^\prime = 80 µA/V² , and λ = 0.01 V^{−1}. The minimum width-to-length ratio ofany transistor is to be unity.
The minimum voltage V_{D3} is to be −2.2 V. This voltage is given by
V_{D3} = V_{GS1} + V_{DS3}(sat) + V^{−} = V_{GS1} + V_{GS3} − V_{T N} + V^{−}
Assuming that M_{1} and M_{3} are matched, we find
V_{D3} = −2.2 = 2V_{GS1} − 0.5 + (−3.3)
or
V_{GS1} = V_{GS3} = 0.8 V
Now
I_{Q} = \frac{k_{n}^\prime}{2} \frac{W}{L} (V_{GS1} − V_{T N})^{2}
or
100 = \frac{80}{2} \left(\frac{W}{L} \right)_{1} (0.8 − 0.5)^{2}
which yields
\left(\frac{W}{L} \right)_{1} = 27.8
If we set
\left(\frac{W}{L} \right)_{1} = \left(\frac{W}{L} \right)_{3} = 28
then we find that V_{GS1} = V_{GS3} = 0.799 V and V_{D3}(min) = −2.202 V.
Assuming that M_{2} and M_{4} are matched, we have
\frac{I_{REF}}{I_{Q}} = \frac{(W/L)_{2}}{(W/L)_{1}}
or
\frac{150}{100} = \frac{(W/L)_{2}}{28}
which yields
\left(\frac{W}{L} \right)_{2} = \left(\frac{W}{L} \right)_{4} = 42
Now the equivalent V_{GS5} is given by
V_{GS5} = V^{+} − 2V_{GS2} − V^{−} = 3.3 − 2(0.799) − (−3.3)
or
V_{GS5} = 5.0 V
The width-to-length ratio is found from
I_{REF} = 150 = \frac{80}{2} \left(\frac{W}{L} \right)_{5} (5.0 − 0.5)^{2}
which yields (W/L)_{5} = 0.185. A width-to-length ratio less than unity is unacceptable. Putting two equivalent M_{5} transistors in series yields a gate-to-source voltage of V_{GS5} = 5.0/2 V. Then
I_{REF} = 150 = \frac{80}{2} \left(\frac{W}{L} \right)_{5} \left(\frac{5.0}{2} − 0.5 \right)^{2}
which yields (W/L)_{5} = 0.938. This value is still less than unity. Putting three equivalent M_{5} transistors in series yields a gate-to-source voltage of V_{GS5} = 5.0/3 V. Then
I_{REF} = 150 = \frac{80}{2} \left(\frac{W}{L} \right)_{5} \left(\frac{5.0}{3} − 0.5 \right)^{2}
which yields (W/L)_{5} = 2.76. This is an acceptable solution.
The output resistance is given by
R_{o} = r_{o3} + r_{o1}(1 + g_{m3} r_{o3})
We find
r_{o1} = r_{o3} = \frac{1}{λ I_{Q}} = \frac{1}{(0.01)(0.1)} ⇒ 1 MΩ
and
g_{m3} = 2 \sqrt{\frac{k_{n}^\prime}{2} \left(\frac{W}{L} \right)_{3} I_{Q}} = 2 \sqrt{\left( \frac{80}{2} \right)(28)(100)} = 669 µA/V
We then find
R_{o} = 1 + 1 [1 + (669)(1)] = 671 M \Omega
This value certainly meets the design criteria.
Comment: The very large output resistance of 671 MΩ assumes that we have ideal MOS transistors. In fact there are leakage currents that, in reality, will lower the output resistance. However, the cascode current source does provide a very high output resistance that is useful in differential amplifiers as we will see in Chapter 11.