Design a circuit and provide the input waveforms required to perform a parallel-to-serial conversion. Specifically, a hexadecimal B (1011) is to be parallel loaded and then transmitted repeatedly to a serial device LSB first.
By controlling the mode control inputs (S_{0}-S_{1}) of a 74194, we can perform a parallel load and then shift right repeatedly. The serial output data are taken from Q_{3}, as shown in Figure 13–22. The 74194 universal shift register is connected as a recirculating parallel-to-serial converter.
Each time the Q_{3} serial output level is sent to the serial device, it is also recirculated back into the left end of the shift register.
First, at the positive edge of clock pulse 0, the register is parallel loaded with a 1011 (B_{16}) because the mode controls (S_{0}-S_{1}) are HIGH– HIGH. (D_{3} is loaded with the LSB because it will be the first bit out when we shift right.)
Next, the mode controls (S_{0}-S_{1}) are changed to HIGH–LOW for a shift-right operation. Now, each successive positive clock edge will shift the data bit one position to the right. The Q_{3} output will continuously have the levels 1101–1101–1101–, and so on, which is a backward hexadecimal B (LSB first).