Question 4.68: Current Switching DAC The circuit in Figure P4-68 is a 4-bit......
Current Switching DAC
The circuit in Figure P4-68 is a 4-bit digital-to-analog converter (DAC). The DAC output is the voltage v_O and the input is the binary code represented by bits b_1, b_2, b_3, and b_4. The input bits are either 0 (low) or 1 (high), and each controls one of the four switches in the figure. When bits are low, their switches are in the left position, directing the 2R leg currents to ground. When bits are high, their switches move to the right position, directing the 2R leg currents to the OP AMP’s inverting input. The 2R leg currents do not change when switching from left to right because the inverting input is a virtual ground (v_N = v_P = 0).
The purpose of this problem is to show that this constant-current switching
produces the following input-output relationship.
Since the inverting input is a virtual ground, show that the currents in the 2R legs are
i_1 = V_{REF}/2R, i_2 = V_{REF}/4R, i_3 = V_{REF}/8R, and i_4 = V_{REF}/16R, regardless of switch positions.
(b) Show that the sum of currents at the inverting input is b_1 i_1 + b_2 i_2+b_3 i_3+b_4 i_4+ i_F = 0 where bits b_k (k =1, 2, 3, 4) are either 0 or 1.
(c) Use the results in parts (a) and (b) to show that the OP AMP output voltage is
v_{\mathrm{O}}=-\frac{\mathbf{R}_{\mathrm{F}}}{2 \mathrm{R}} \mathrm{V}_{\mathrm{REF}}\left(\mathbf{b}_1+\frac{\mathbf{b}_2}{2}+\frac{\mathbf{b}_3}{4}+\frac{\mathbf{b}_4}{8}\right) as stated.
(a) The equivalent resistance seen by the reference voltage source is R, so the current flowing out of the source is i = V_{REF}/R. The equivalent resistance to the right of node A, is 2R, so the current splits equally at node A and i_1 = i/2 = V_{REF}/2R. The equal current divisions repeat three more times in the same manner to yield i_2 = V_{REF}/4R, i_3 = V_{REF}/8R, and i_4 = V_{REF}/16R.
(b) If a bit is set to 1, the corresponding switch allows the current to flow into the inverting input node. The feedback current i_F always flows into the node, so the corresponding KCL equation is given by b_1 i_1 + b_2 i_2 + b_3 i_3 + b_4 i_4 + i_F = 0 as expected.
(c) Given the KCL equation in the solution to Part (b), we can solve for i_F and then v_O as follows.
Answer:
Presented above.