Question 22.9: Determine the minimum and maximum input common-mode voltage ......
Determine the minimum and maximum input common-mode voltage for the diff-amp seen in Fig. 22.31. Note that the voltage across M6 is V_{GS}+V_{DS,sat}, where V_{GS} is the gate-source voltage of the other NMOS devices in this figure (see Fig. 20.32 and the associated discussion).
The minimum input common-mode voltage is given by
V_{C M M IN}=V_{G S1,2}+2V_{D S,sa t}=1.05+0.5=1.55~VAs mentioned a moment ago, MC1 and MC2 must be kept in the saturation region. If we assume that the drains of MC1 and MC2 are at VDD- V_{SG} (=3.85 V), then when MC1 and MC2 are on the verge of trioding (their drain-source voltages are V_{DS,sat}), the drains of M1 and M2 are at
V_{D1,2}=V D D-V_{S G}-V_{D S,sa t}=3.6~VWe know for an NMOS device (M1 or M2) to be in saturation
V_{D}\geq V_{G}-V_{T H N}{\mathrm{~and~}}\mathrm{so~}V_{D1,2}\geq V_{C M M AX}-V_{T H N}giving a V_{CMMAX} = 4.4 V. In terms of an arbitrary output voltage, we can write
V_{C M M A X}=V_{o u t}-V_{D S,s a t}+V_{T H N}so if V_{out} is 2.45 V, then V_{C M M A X}=3\ V.