Determine the output of the ADC in Fig. 30.38 if the input voltage is 1 V.
We begin by sampling the input voltage of 1 V. The output of the comparator is a logic 1 (MSB). Next,V_{_{C M}} (= 0.5 V) is subtracted from the S/H output resulting in an output of 0.5 V. This output is multiplied by 2 resulting in 1 V. This 1 V output (the output of the multiplier) is cycled back to the S/H input.
Next, we sample the fed back voltage of 1 V, the output of the comparator is, again, a logic 1 (MSB – 1).V_{_{C M}} (= 0.5 V) is subtracted from the S/H output resulting in 0.5 V. This output is multiplied by 2 resulting in 1 V. This 1 V output (the output of the multiplier) is cycled back to the S/H input.
This continues and the final output of the ADC hold register is 1111 1111 (binary offset format).