Estimate the AC components of the drain currents of M1 and M2 for the circuit in Fig. 22.2 if [latex]\nu_{I1}=2.5+1mV\cdot \text{sin}(2\pi \cdot 1kHz\cdot t)[/latex]. Verify your hand calculations using SPICE.

From Table 9.1 we know the [latex]g_m[/latex] of the NMOS devices used in the diff-pair is 150 μA/ V . The AC component of [latex]\nu_{I2}[/latex] is zero so we know [latex]\nu_{g s1}=-\nu_{g s2}=0.5\;m V[/latex] and thus [latex]i_{d}=g_{m}\nu_{g s}=(150\times10^{-6})(500\times10^{-6})=75\;nA[/latex] This is the AC component of the drain currents. When [latex]i_{d1}=75\ \mathrm{nA,}\ \mathrm{then}\ \dot{l}_{d2}=-75[/latex] nA. The overall drain currents are written as [latex]i_{D1}=20\ \mu A+(75\ n A)\cdot\sin\left(2\pi 1k\cdot t\right)\ \text{and}\ i_{D2}=20\ \mu A-(75\ nA)\cdot\sin\left(2\pi1k\cdot t\right)[/latex] The simulation results are seen in Fig. 22.10.

Question 22.4: Estimate the AC components of the drain currents of M1 and M......

CMOS Circuit Design, Layout, and Simulation [1366182]

Estimate the AC components of the drain currents of M1 and M2 for the circuit in Fig. 22.2 if $\nu_{I1}=2.5+1mV\cdot \text{sin}(2\pi \cdot 1kHz\cdot t)$ . Verify your hand calculations using SPICE.

Step-by-Step

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From Table 9.1 we know the $g_m$ of the NMOS devices used in the diff-pair is 150 μA/V. The AC component of $\nu_{I2}$ is zero so we know

\nu_{g s1}=-\nu_{g s2}=0.5\;m V

and thus

i_{d}=g_{m}\nu_{g s}=(150\times10^{-6})(500\times10^{-6})=75\;nA

This is the AC component of the drain currents. When $i_{d1}=75\ \mathrm{nA,}\ \mathrm{then}\ \dot{l}_{d2}=-75$ nA. The overall drain currents are written as

i_{D1}=20\ \mu A+(75\ n A)\cdot\sin\left(2\pi 1k\cdot t\right)\ \text{and}\ i_{D2}=20\ \mu A-(75\ nA)\cdot\sin\left(2\pi1k\cdot t\right)

The simulation results are seen in Fig. 22.10.

Table 9.1 Typical parameters for analog design using the long-channel CMOS process discussed in this book. Note that the parameters may change with temperature or drain-to-source voltage (e.g., Fig. 9.24).

Long-channel MOSFET parameters for general analog design
VDD = 5 V and a scale factor of 1 μm (scale = 1e-6)

Parameter	NMOS	PMOS	Comments
Bias current, $I_D$	20 $\mu A$	20 $\mu A$	Approximate
W/L	10/2	30/2	Selected based on $I_D\ \text{and}\ V_{DS,sat}$
$V_{DS,sat}\ \text{and}\ V_{SD,sat}$	250 mV	250 mV	For sizes listed
$V_{GS}\ \text{and}\ V_{SG}$	1.05 V	1.15 V	No body effect
$V_{THN}\ \text{and}\ V_{THP}$	800 mV	900 mV	Typical
$\partial V_{THN,P}/\partial T$	$-1\ \text{mV/C°}$	$-1.4\ \text{mV/C°}$	Change with temperature
$KP_n\ \text{and}\ KP_p$	$120\ \mu A/V^2$	$40\ \mu A/V^2$	$t_{ox}=200\ \mathring{A}$
$C_{o x}^{\prime}=\varepsilon _{o x}/t_{o x}$	$1.75fF/\mu m^2$	$1.75fF/\mu m^2$	$C_{ox}=C_{o x}^{\prime}WL\cdot (scale)^2$
$C_{oxn}\ \text{and}\ C_{oxp}$	$35fF$	$105fF$	PMOS is three times wider
$C_{gsn}\ \text{and}\ C_{sgp}$	$23.3fF$	$70fF$	$C_{gs}=\frac{2}{3}C_{ox}$
$C_{gdn}\ \text{and}\ C_{dgp}$	$2fF$	$6fF$	$C_{gd}=CGDO\cdot W\cdot scale$
$g_{mn}\ \text{and}\ g_{mp}$	$150\ \mu A/V$	$150\ \mu A/V$	$At\ I_D=20\ \mu A$
$r_{on}\ \text{and}\ r_{op}$	$5\ M\Omega$	$4\ M\Omega$	Approximate at $I_D=20\ \mu A$
$g_{mn}r_{on}\ \text{and}\ g_{mp}r_{op}$	750 V/V	600 V/V	Open circuit gain
$\lambda _n\ \text{and}\ \lambda _p$	$0.01\ V^{-1}$	$0.0125\ V^{-1}$	At L = 2
$f_{Tn}\ \text{and}\ f_{Tp}$	900 MHz	300 MHz	$\text{For}\ L=2,f_T\ \text{goes up if}\ L=2$