Question 9.36: How does emitter-coupled logic operate? What are its specifi......

In Fig. 9.35, causing A to go HIGH will drive the Q_{2} collector LOW, causing both the base and emitter of Q_{1} to go LOW, outputting a LOW on the NOR lead. At the same time, the Q_{4} emitter will go HIGH, tending to cut it off, and the Q_{5} base will go HIGH as will the Q_{5} emitter, and, consequently, the OR output. D_{1} and D_{2} provide a constant voltage supply to the Q_{6} base and, therefore a constant voltage to the Q_{4} base so that it can operate as a common base amplifier.

Output levels are -0.8 \mathrm{~V} for a logical 1 and -1.8 \mathrm{~V} for a logical 0 .