Question 10.SG.Q.29: In the CMOS circuit shown below, the electron and hole mobil......
In the CMOS circuit shown below, the electron and hole mobilities are equal, and M_1 and M_2 are equally sized. The device M_1 is in the linear region if
(a) V_{\text {in }}<1.875 V (b) 1.875 V <V_{ in }<3.125 V
(c) V_{\text {in }}<3.125 V (d) 0<V_{\text {in }} <5 V
The given inverter is a CMOS inverter and since the threshold voltage values of both N-MOSFET and P-MOSFET transistors are equal, it is also a symmetric inverter. The following graph shows the I-V characteristics of the inverter.
It shows that:
(i) For V_{in} slightly greater than V_{Th} . P-MOSFET (M_1) stays in linear region and N-MOSFET (M_2) in the saturation region.
(ii) As V_{in} increases, the drain current increases, voltage drop across M_1 increases and the output voltage reduces.
(iii) P-MOSFET (M_1) enters into saturation region at a later point.
Hence, we have that P-MOSFET M_1 is in linear region for V_{in} < 1.875 V.
Ans. (a)
