Repeat Ex. 30.16 if the comparators switch at 305 mV (a 55 mV offset) and 675 mV (a -75 mV offset).
and b_{8}=a_{1.57}\oplus c_7=1. Again, we can reorder the bits so the MSB is on the left, the LSB is on the right, yielding 1 0001 1000 and subtract 0 0111 1111 yielding
1 0001 1000 (280)
–0 0111 1111 (127)
0 1001 1001 (153)
This is the exact result given in Ex. 30.10 (1001 1001, or decimal 153). In this case the 0.5 LSB round-off worked in our favor.
While the comparator performance can be extremely poor, the circuit of Fig. 30.42 must subtract and amplify to an accuracy set by the least significant bit of the converter. When we calculated values in Ex. 30.16 and here in this example we assumed subtractions of exactly 0, V_{\scriptscriptstyle C M}, and 2V_{\scriptscriptstyle C M}followed by a multiplication of exactly two.
Finally, notice that the negative output of -100 mV (single-ended) and the 1.1 V output that is greater than VDD (= 1 V here) are easily accommodated when using fully-differential op-amps.