Repeat Ex. 30.9 if the Cyclic ADC input is 600 mV.
1. Sample the 600 mV input voltage. The comparator output goes high (MSB, b_{_{7}}, = 1). The output of the multiply by 2, after subtracting V_{_{C M}} (= 500 mV) from the S/H output, is 200 mV.
2. Sample the 200 mV fed back voltage. The comparator output goes low (b_{_{6}} = 0). The output of the multiplier is 400 mV.
3. Sample 400 mV. The comparator output goes low (b_{_{5}} = 0). The output of the multiplier is 800 mV.
4. Sample 800 mV. The comparator output goes high (b_{_{4}} = 1). The output of the multiplier is 600 mV.
5. Sample 600 mV (b_{_{3}} = 1) output of the multiplier is 200 mV.
6. Sample 200 mV (b_{_{2}} = 0) output of the multiplier is 400 mV.
7. Sample 400 mV (b_{_{1}} = 0) output of the multiplier is 800 mV.
8. Sample 800 mV (b_{_{0}} = 1) output of the multiplier is 600 mV.
9. Sample the new input voltage and begin conversion again. The output word in the hold register is 1001 1001 (binary offset).