Question 23.2: Resimulate the BMR in Fig. 20.18 using a cascode current mir......

Using the cascode current mirror, we expect the currents through each branch of the reference to be very nearly equal. As seen in the simulation results in Fig. 23.10, the currents are equal. However, they are not constant and independent of changes in VDD. Similarly, if we were to use V_{biasn} as a reference voltage (see Sec. 20.1.5), then V_{biasn} would show a large sensitivity to changes in VDD. The problem with cascoding only the PMOS devices is that while the currents through each branch are equal (but not constant), the variation with VDD is still present. The voltages at the drains of M1 and M2 change with VDD. To reduce this voltage variation, we might consider cascoding the NMOS devices as well (see Fig. 23.11). The PMOS devices are still used to force the same current through each side of the reference, while now the NMOS cascode stack is used to keep the voltages across M1 and M2 constant with changes in VDD. As the simulation results, Fig. 23.12, show, the currents do stabilize but at a voltage 20% higher than VDD. Clearly, cascoding devices won’t be useful in a short-channel CMOS process (and so we ‘ll stick with using the added amplifier to both set the currents and hold the voltage across M1 and M2 constant in the remainder of the short-channel CMOS designs presented in this chapter). Note that cascoding devices can be useful when designing in long-channel CMOS processes. In these processes, the threshold voltage is a smaller percentage of the power supply voltage. For example, in our short-channel process, Table 9.2, this percentage is 28%. In the long-channel process, Table 9.1, it is 16%. Also note that using NMOS cascodes alone won’t make the reference more tolerant to changes in VDD. The NMOS cascodes will keep the voltages across M1 and M2 constant (but not equal). Since the currents through each branch aren’t equal (because the PMOS devices aren’t cascoded), we still get significant sensitivity to VDD.

Finally, we need to, again (see Fig. 20.15 and the associated discussion), mention the importance of the start-up circuit. The start-up circuit is often overlooked and is often a cause of problems in practical designs. We include a start-up circuit in every self-biased reference to avoid the situation where zero current flows in the reference. It’s important to ensure that the start-up circuit doesn’t affect normal operation or draw too much current from VDD. For the start-up circuit seen in Figs. 23.9 and 23.11, we use the V_{biasn} to set the current drawn by the bias circuit. In normal operation, MSU3 should be off (it should have a negative V_{GS}).