Question 30.18: Simulate the operation of the circuit shown in Fig. 30.57. C......

The capacitor values were chosen arbitrarily. The input voltage, v_{i n}, is 0.75 – 0.25 or 0.5 V. The ideal output voltage, v_{out}, is then 1 V. v_{out+} should ideally be 1 V, and v_{out-} should ideally be 0 V. The simulation results are shown in Fig. 30.58. The error plotted in this figure is the result of taking the difference between the ideal output and the actual output. The error for the capacitor values shown in Fig. 30.57 is approximately 5 mV. Clearly, at the risk of stating the obvious, capacitor mismatch is a fundamental limitation to ADC accuracy.