Common Data for Questions 26 and 27: The channel resistance of an N-channel JFET shown in the figure below is 600 Ω, when the full channel thickness (t_{ch}) of 10 mm is available for conduction. The built-in voltage of the gate P^+N junction (V_{bj}) is −1 V. When the gate-to-source voltage (V_{GS}) is 0 V, the channel is depleted by 1 mm on each side due to the built-in voltage and hence the thickness available for conduction is only 8 mm.
The channel resistance when V_{ GS }=0 V is
(a) 480 Ω (b) 600 Ω
(c) 750 Ω (d) 1000 Ω
Given that the channel resistance R_o at t_{ ch }=100 \mu m \text { is } 600 \Omega.
Also, at V_{ GS }=0 V , t_{ ch }=8 \mu m
As R \propto \frac{1}{A}, and A=t_{ ch } W \text {. } ThRerefore, R \propto \frac{1}{t_{ ch }}
(A is the cross-sectional area of the channel and W is the channel width.)
Therefore, channel resistance R_1 \text { at } V_{ GS }=0 V
R_1=\frac{\left(10 \times 10^{-6}\right)}{\left(8 \times 10^{-6}\right)} \times 600=750 \Omega
Ans. (c)