The gate-source overlap capacitance is approximately (a) 0.7 fF (b) 0.7 pF (c) 0.35 fF (d) 0.24 pF

Question

Common Data for Questions 30 and 31: In the three-dimensional view of a silicon N channel MOS transistor shown in the figure, δ = 20 nm. The transistor is of width 1 mm. The depletion width formed at every P—N junction is 10 nm. The relative permittivities of Si and $SiO_2$ , respectively, are 11.7 and 3.9, and $\varepsilon_0=8.9 \times 10^{-12} F / m$ .

The gate-source overlap capacitance is approximately

(a) 0.7 fF (b) 0.7 pF

(c) 0.35 fF (d) 0.24 pF

The gate-source overlap capacitance is approximately

(a) 0.7 fF (b) 0.7 pF

(c) 0.35 fF (d) 0.24 pF

Accepted Answer

Gate-source capacitance

[latex]C_{ g }=\frac{\varepsilon_1 A_1}{d_1}=\frac{\varepsilon_0 \varepsilon_{r 1} A_1}{d_1}[/latex]

[latex]\varepsilon_{ T 1}=3.9[/latex] as between gate and source there is [latex]SiO _2 [/latex]

[latex]A_1=1 \mu m imes \delta=1 imes 10^{-6} imes 20 imes 10^{-9}=2 imes 10^{-14} m ^2 d_1=1 nm =10^{-9} m[/latex]

Therefore,

[latex]C_{ g }=\frac{8.9 imes 10^{-12} imes 3.9 imes 2 imes 10^{-14}}{10^{-9}}=0.7 pF[/latex]

Ans. (a)

Question 10.SG.Q.31: The gate-source overlap capacitance is approximately (a) 0.7......

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