A D/A converter incorporates N equal current sources implemented as NMOS devices, each having an aspect ratio of W/L [Fig. 18.23(a)]. Assuming that the interconnect between every two consecutive current sources has a small resistance, r, estimate the mismatch between IN and I1

Question

A D/A converter incorporates N equal current sources implemented as NMOS devices, each having an aspect ratio of W/L [Fig. 18.23(a)]. Assuming that the interconnect between every two consecutive current sources has a small resistance, r, estimate the mismatch between [latex] I_N ext { and } I_1 [/latex].

Accepted Answer

If r is sufficiently small, the circuit can be modeled as shown in Fig. 18.23(b), where [latex] I_1 \approx I_2 \approx \cdots \approx I_N=I [/latex]. The voltage at node N is obtained by superposition of currents:

[latex] \begin{aligned} V_N &=I r+I(2 r)+\cdots+I(N r) &(18.5)\ &=\frac{N(N+1)}{2} \operatorname{Ir}&(18.6) \end{aligned} [/latex]

If [latex]V_N[/latex] is relatively small, the assumption that [latex]I_1 \approx I_2 \approx \cdots \approx I_N[/latex] used in the above calculation is reasonable and [latex]M_1-M_N[/latex] exhibit roughly equal transconductances. Thus,

[latex]\begin{aligned} I_N &=I-g_m V_N &(18.7)\ &=I-g_m r \frac{N(N+1)}{2} I &(18.8)\ &=I\left[1-g_m r \frac{N(N+1)}{2} ight]&(18.9) \end{aligned}[/latex]

Since [latex] V_1 \approx N \cdot I \cdot r [/latex], we have [latex] I_1=I-g_m N \cdot I \cdot r [/latex], and the relative mismatch between [latex] I_1 ext { and } I_N [/latex] is

[latex] \left|\frac{I_1-I_N}{I} ight|=g_m r \frac{N(N-1)}{2} [/latex] (18.10)

The key point here is that the error grows in proportion to [latex] N^2 [/latex]. The ground bus must therefore be sufficiently wide to minimize r.

Question 18.3: A D/A converter incorporates N equal current sources impleme...

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