Question 1.5: Objective: Calculate the built-in potential barrier of a pn ...

Microelectronics Circuit Analysis and Design

Objective: Calculate the built-in potential barrier of a pn junction. Consider a silicon pn junction at T = 300 K, doped at $N_{a} = 10^{16} cm^{−3}$ in the p-region and $N_{d} = 10^{17} cm^{−3}$ in the n-region.

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From the results of Example 1.1, we have $n_{i} = 1.5 \times 10^{10} cm^{-3}$ for silicon at room temperature. We then find

V_{bi} = V_{T} \ln \left(\frac{N_{a} N_{d}}{n_{i} ^{2}} \right) = (0.026) \ln \left[\frac{(10^{16})(10^{17})}{(1.5  \times  10^{10})^{2}} \right] = 0.757  V

Comment: Because of the log function, the magnitude of $V_{bi}$ is not a strong function of the doping concentrations. Therefore, the value of $V_{bi}$ for silicon pn junctions is usually within 0.1 to 0.2 V of this calculated value

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