Question 9.4: Objective: Design a summing amplifier to produce a specified...

Objective: Design a summing amplifier to produce a specified output signal. Specifications: The output signal generated from an ideal amplifier circuit is v_{O1} = 1.2  −  0.5 \sin ω  t (V). Design a summing amplifier to be connected to the am-plifier circuit such that the output signal is v_{O} = 2 \sin ω  t (V).
Choices: Standard precision resistors with tolerances of ±1 percent are to be used in the final design. Assume an ideal op-amp is available

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In this case, we need only two inputs to the summing amplifier, as shown in Figure 9.14. One input to the summing amplifier is the output of the ideal amplifier circuit and the second input should be a dc voltage to cancel the +1.2 V signal from the amplifier circuit. If the voltage gains of each input to the summing amplifier are equal, then an input of −1.2 V at the second input will cancel the +1.2 V from the amplifier circuit.
For a −0.5 V sinusoidal input signal and a desired 2 V sinusoidal output signal, the summing amplifier gain must be
A_{v} = \frac{−R_{F}}{R_{1}} = \frac{2}{−0.5} = −4
If we choose the input resistances to be R_{1} = R_{2} = 30  k\Omega, then the feedback resistance must be R_{F} = 120  k \Omega.
Trade-offs: From Appendix C, we can choose precision resistor values of
R_{F} = 124  k\Omega and R_{1} = R_{2} = 30.9  k\Omega. The ratio of the ideal resistors is 4.013. Considering the ±1 percent tolerance values, the output of the summing amplifier is
v_{O} = \frac{−R_{F} (1  ±  0.01)}{R_{1}(1  ±  0.01)} \cdot (1.2  −  0.5 \sin ωt)  −  \frac{R_{F} (1  ±  0.01)}{R_{2}(1  ±  0.01)} \cdot (−1.2)
The dc output voltage is in the range −0.1926 ≤ v_{O} (dc) ≤ 0.1926  V and the peak ac output voltage is in the range 1.967 ≤ v_{O} (ac) ≤ 2.047  V.
Comment: In this example, we have used a summing amplifier to amplify a time-varying signal and eliminate a dc voltage (ideally).

9.14

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