Question 9.3: Show the timing diagram and determine the sequence of a 4-bi...

Digital Fundamentals

Show the timing diagram and determine the sequence of a 4-bit synchronous binary up/down counter if the clock and $UP/\overline{DOWN}$ control inputs have waveforms as shown in Figure 9–23(a). The counter starts in the all-0s state and is positive edge-triggered.

Figure 9.23

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The timing diagram showing the Q outputs is shown in Figure 9–23(b). From these waveforms, the counter sequence is as shown in Table 9–7.

TABLE 9–7
$Q_{3}$	$Q_{2}$	$Q_{1}$	$Q_{0}$
0	0	0	0	$\left.\begin{array}{l}& \\ & \\ & \\ & \\ & \\ & \\ & \\ &\\ & \\ & \\ & \\ &\\& \\ & \\ &\end{array}\right\}$ UP
0	0	0	1
0	0	1	0
0	0	1	1
0	1	0	0
0	0	1	1	$\left.\begin{array}{l}& \\ & \\ & \\ & \\ & \\ & \\ & \\ &\\ & \\ & \\ & \\ &\\& \\ & \\ &\end{array}\right\}$ DOWN
0	0	1	0
0	0	0	1
0	0	0	0
1	1	1	1
0	0	0	0	$\left.\begin{array}{l}& \\ & \\ & \\ & \\ & \\ & \\ & \\ &\\ &\end{array}\right\}$ UP
0	0	0	1
0	0	1	0
0	0	0	1	$\left.\begin{array}{l}& \\ & \\ & \\ &\\ &\end{array}\right\}$ DOWN
0	0	0	0

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