Question 7.PE.2: To investigate the reset action of the 4-bit asynchronous bi...
To investigate the reset action of the 4-bit asynchronous binary counter
For this exercise you will need the following components and equipment:
1 – 74LS93 ic (4-bit binary counter)
4 – LED (5 mm) and resistor (270 Ω)
1 – +5 V dc power supply
1 – pulse generator (1 Hz and 1 kHz) (see Figure 1.5)
1 – double beam cathode ray oscilloscope
The 7493 ic is a 4-bit device, arranged as a divide-by-2 (using flipflop A only) and divide-by-8 (flipflops B to D), with separate inputs and outputs. Thus, by using all four flipflops it will behave as a divide-by-16 (modulo 16) counter. The use of the reset inputs in conjunction with the internal NAND gate will enable the count to be stopped (reset) at certain points in the sequence. The reset inputs labelled R_{01} and R_{02} require a logic 1 and will reset the counter to 0.
1 The pin connections for the 7493 ic are given in Figure 7.7. Note that pin 12 must be externally connected to pin 1.
2 Make up the 4-bit counter using Figure 7.5 as a guide. Note that the J and K inputs are internally connected to the +5 V supply.
3 Connect R_{01} and R_{02} to logic 0. Note that the 7493 ic has no preset inputs and no \bar{Q} outputs.
4 Apply a series of +5 V pulses to the clock input of flipflop A as before (or use the generator).
5 The counter should go through the counting sequence from 0 to 15, resetting on the 16th pulse.
6 With the higher frequency pulse (1 kHz) as the clock input, as in the previous exercise, have a look at the waveforms at each of the outputs Q_A to Q_D and relate them separately to the clock input waveform.
7 Draw the waveform diagram, similar to Figure 7.3, but appropriate to the 4- bit counter.
8 Return to a low frequency clock pulse (or the +5 V supply) and connect the reset inputs R_{01} and R_{02} to outputs Q_B and Q_D respectively.
9 The count should now be from 0 to 9, resetting on the 10th pulse. This is now the decade counter.
