Question 12.10: Voltage Supply Limits in an Op-Amp Integrator Compute and sk...
Voltage Supply Limits in an Op-Amp Integrator
Compute and sketch the output voltage of the integrator of Figure 12.30.
Known Quantities: Resistor, capacitor, and supply voltage values; input voltage.
Find: v_{\text {out }}(t).
Schematics, Diagrams, Circuits, and Given Data: R_{S}=10 \mathrm{k} \Omega ; C_{F}=20 \mu \mathrm{F} ; V_{S}^{+}=15 \mathrm{~V} ; V_{S}^{-}=-15 \mathrm{~V} ; v_{S}(t)=0.5+0.3 \cos (10 t).
Assumptions: Assume supply voltage-limited op-amp. The initial condition is v_{\text {out }}(0)=0.
Analysis: For an ideal op-amp integrator the output would be:
\begin{aligned}v_{\text {out }}(t) &=-\frac{1}{R_{S} C_{F}} \int_{-\infty}^{t} v_{S}\left(t^{\prime}\right) d t^{\prime}=-\frac{1}{0.2} \int_{-\infty}^{t}\left[0.5+0.3 \cos \left(10 t^{\prime}\right)\right] d t^{\prime} \\&=-2.5 t+1.5 \sin (10 t)\end{aligned}
However, the supply voltage is limited to \pm 15 \mathrm{~V}, and the integrator output voltage will therefore saturate at the lower supply voltage value of -15 \mathrm{~V} as the term 2.5 t increases with time. Figure 12.44 depicts the output voltage waveform.
Comments: Note that the DC offset in the waveform causes the integrator output voltage to increase linearly with time. The presence of even a very small DC offset will always cause integrator saturation. One solution to this problem is to include a large feedback resistor in parallel with the capacitor; this solution is explored in the homework problems.
Focus on Computer-Aided Solutions: An Electronics Workbench { }^{\mathrm{TM}} simulation of a practical integrator (including the feedback resistance mentioned in the comments above) can be found in the accompanying CD-ROM. Try removing the feedback resistor to verify that saturation at the supply voltages is a real problem.
