(a) Successive approximation
(b) Dual-slope
(b) Parallel comparator Maximum conversion time for 8 bit ADC in clock cycles
(1) 1 (2) 2
(3) 16 (4) 256
(5) 512
Question 8.1.9: (a) Successive approximation (b) Dual-slope (b) Parallel com...
Successive approximation: T_{\max }=n T_{ clk }
n = number of bits =8 T_{ clk }
(b) Dual-slope: 2^{n^{H}} T_{ clk }=2^{9} T_{ clk }
(c) Parallel comparator =572 T_{ clk }
⇒ =1 T_{ clk }.
Hence, the correct option is (a).
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