Question 9.3: Analyzing an NMOS differential pair with an active current s...

(a) The DC drain current and the gate–source voltage of the MOSFETs can be determined from the DC commonmode half circuit for v_{ g 1}=v_{ g 2}=0 , shown in Fig. 9.12:

V_{ GS }+2 I_{ D } R_{ SS }=V_{ SS }

Substituting i_{ D }=I_{ D } \text { and } v_{ GS }=V_{ GS } from Eq. (9.37) into the preceding equation, we get

i_{ D }=K_{ n }\left(v_{ GS }-V_{ t }\right)^{2}                                                 (9.37)

V_{ GS }+2 R_{ SS } K_{ n }\left(V_{ GS }-V_{ t }\right)^{2}=V_{ SS }

Substituting the values, we get

V_{ GS }+2 \times 50 k \times\left(V_{ GS }-1\right)^{2}=15

This quadratic equation yields the solution for the gate–source voltage V_{ GS }=1.478 V , \text { or } 0.514 V . Since V_{ GS }>V_{ t }, the acceptable value is V_{ GS }=1.478 V which gives the drain current as

I_{ D 1}=K_{ n }\left(V_{ GS }-V_{ t }\right)^{2}=1.25 m \times(1.478-1)^{2}=285.6 \mu A

Therefore, the voltage at the source with respect to the ground is

V_{ SR }=-V_{ GS }=-1.478 V \quad \text { and } I_{ Q }=2 I_{ D }=2 \times 285.6 \mu=571.2 \mu A

(b) From Eq. (9.54),

\begin{aligned}g_{ m } &=2 K_{ n }\left(V_{ GS }-V_{ t }\right) \\&=2 \overline{2 K_{ n } I_{ Q }}\end{aligned}                                (9.54)

\begin{aligned}&g_{ m }=2 \overline{2 K_{ n } I_{ Q }}=2 \overline{2 \times 1.25 m \times 571.2 \mu}=1.194 mA / V \\&r_{ o 1}=\frac{V_{ M }}{I_{ D }}=\frac{100}{285.6 \mu}=350 k \Omega\end{aligned}

From Eq. (9.55),

A_{ d }=\frac{v_{ od } / 2}{v_{ id } / 2}=-g_{ m }\left(r_{ o 1} \| R_{ D }\right)                             (9.55)

A_{ d }=-g_{ m }\left(R_{ D } \| r_{ o1 }\right)=-1.194 m \times(5 k \| 350 k )=-5.89 V / V

From Eq. (9.57),

A_{ c }=\frac{v_{ oc }}{v_{ ic }}=\frac{-g_{ m } R_{ D }}{1+g_{ m } 2 R_{ SS }}                                  (9.57)

A_{ c }=\frac{-g_{ m } R_{ D }}{1+g_{ m } \times 2 R_{ SS }}=\frac{-1.194 m \times 5 k }{1+1.194 m \times 2 \times 50 k }=-0.0489

Thus, CMRR =\left|A_{ d } / A_{ c }\right|=5.89 / 0.0489=120.4, \text { or } 41.61 dB . From Eq. (9.59),

R_{ ic }=R_{ id }=\infty                                      (9.59)

R_{ id }=R_{ ic }=\infty

We know that

\begin{aligned}&v_{ id }=v_{ g 2}-v_{ g 1}=20 mV -10 mV =10 mV \\&v_{ ic }=\frac{v_{ g 1}+v_{ g 2}}{2}=\frac{10 mV +20 mV }{2}=15 mV\end{aligned}

Using Eq. (9.10), we have

A_{ d } v_{ id }+A_{ c } v_{ ic }                                   (9.10)

v_{ o }=A_{ d } v_{ id }+A_{ c } v_{ ic }=-5.887 \times 10 mV -0.489 \times 15 mV =-59.6 mV

Thus, the output voltage and the voltage gain are much lower than with current-source biasing because the biasing current is low.