Analyzing cascoded MOS amplifiers
The DC biasing current of the MOS amplifier shown in Fig. 9.19(a) is kept constant at I_{ Q }=10 \mu A . All MOS transistors are identical: V_{ M }=20 V , K_{ n }=25 \mu A / V ^{2}, W=30 \mu m , and L = 10 µm.
(a) Determine the differential voltage gain A_{ d } for single-ended output at the drain terminal of M _{4} .
(b) Use PSpice to verify the result.
You are given V_{ M }=20 V , K_{ n }=25 \mu A / V ^{2}, W=30 \mu m , L=10 \mu m , \text { and } I_{ D }=I_{ Q } / 2=10 \mu A / 2=5 \mu A .
(a) The output resistance of M _{2} \text { is } r_{ o 2}=r_{ o 4}=r_{ o 6}=r_{ o 8}=2 V_{ M } / I_{ Q }=2 \times 20 V / 10 \mu A =4 M \Omega . The transconductance of M _{2} \text { is } g_{ m 2}=2 \overline{2 K_{ n } I_{ Q }}=2 \overline{2 \times 25 \mu \times 10 \mu}=22.36 \mu A / V . The load resistance due to M _{2} \text { and } M _{4} cascoded combination is
r_{04}^{\prime}=r_{ o 6}^{\prime}=r_{ o 4}\left(2+g_{ m 2} r_{ o4 }\right)=4 M \Omega \times(2+22.36 \mu A / V \times 4 M \Omega)=366 M \Omega
The effective resistance of the active load is R_{ o }=r_{ o 4}^{\prime}\left\|r_{ o 6}^{\prime}=366 M \right\| 366 M =183 M \Omega .
Thus, the differential voltage becomes A_{ d }=g_{ m 2} R_{ o }=22.36 \mu \times 183 M =4089 V / V .
(b) The circuit for PSpice simulation is shown in Fig. 9.20 with a sinusoidal signal of 1 µV at 10 Hz. The plot of the output voltage is shown in Fig. 9.21, which gives a voltage gain of 5370 V⁄ V (expected value 4089 V⁄ V). Note there is no phase shift of 180° because the output is taken from the drain terminal of the other pair.
