Determine the output signal at Q_{7} if we connect a 74HC165 with D_{S} = 0 and CP INH = 0 and then apply the input waveforms given in Figure 7-72. P_{0}-P_{7} represent the parallel data on P_{0} P_{1} P_{2} P_{3} P_{4} P_{5} P_{6} P_{7}.
Determine the output signal at Q_{7} if we connect a 74HC165 with D_{S} = 0 and CP INH = 0 and then apply the input waveforms given in Figure 7-72. P_{0}-P_{7} represent the parallel data on P_{0} P_{1} P_{2} P_{3} P_{4} P_{5} P_{6} P_{7}.
We have drawn the timing diagram for all eight FFs so that we could track their contents over time even though only Q_{7} will be accessible. The parallel load is asynchronous and will occur as soon as {SH}/{\overline{LD}} goes LOW. After {SH}/{\overline{LD}} returns to a HIGH, the data stored in the register will move one FF to the right (toward Q_{7}) with each PGT on CP.