Question 9.16: The circuit in Fig. 9.52 has a load consisting of the parall...

We begin by assuming zero capacitance across the load. After constructing the phasor diagram for the zero-capacitance case, we can add the capacitor and study its effect on the amplitude of \pmb{V}_{s} holding the amplitude of \pmb{V}_{L} constant. Figure 9.53 shows the frequency-domain equivalent of the circuit shown in Fig. 9.52. We added the phasor branch currents \pmb{I},\pmb{I}_{a}, and \pmb{I}_{b} and to Fig. 9.53 to aid discussion.

Figure 9.54 shows the stepwise evolution of the phasor diagram. Keep in mind that we are not interested in specific phasor values and positions in this example, but rather in the general effect of adding a capacitor across the terminals of the load. Thus, we want to develop the relative positions of the phasors before and after the capacitor has been added. Relating the phasor diagram to the circuit shown in Fig. 9.53 reveals the following points:

a) Because we are holding the amplitude of the load voltage constant, we choose \pmb{V}_{L} as our reference. For convenience, we place this phasor on the positive real axis.

b) We know that\pmb{I}_{a} is in phase with \pmb{V}_{L} and that its magnitude is \frac{|\pmb{V}_{L}|}{R_{2}} .(On the phasor diagram, the magnitude scale for the current phasors is independent of the magnitude scale for the voltage phasors.)

c) We know that \pmb{I}_{b} lags behind \pmb{V}_{L} by 90 and that its magnitude is \frac{|\pmb{V}_{L}|}{\omega L_{2}}.

d) The line current \pmb{I}  is equal to the sum of \pmb{I}_{a} and \pmb{I}_{b} .

e) The voltage drop across R_{1} is in phase with the line current, and the voltage drop across j \omega L_{1} leads the line current by 90 .

f) The source voltage is the sum of the load voltage and the drop along the line; that is, \pmb{V}_{s}=\pmb{V}_{L}+ (R_{1} + j \omega L_{1})\pmb{I}.

Note that the completed phasor diagram shown in step 6 of Fig. 9.54 clearly shows the amplitude and phase angle relationships among all the currents and voltages in Fig. 9.53. Now add the capacitor branch shown in Fig. 9.55. We are holding \pmb{V}_{L} constant, so we construct the phasor diagram for the circuit in Fig. 9.55 following the same steps as those in Fig. 9.54, except that, in step 4, we add the capacitor current\pmb{I}_{c} to the diagram. In so doing, \pmb{I}_{c}leads \pmb{V}_{L} by 90 with its magnitude being |\pmb{V}_{L}\omega C| . Figure 9.56 shows the effect of \pmb{I}_{c} on the line current: Both the magnitude and phase angle of the line current \pmb{I} change with changes in the magnitude of \pmb{I}_{c}. As \pmb{I} changes, so do the magnitude and phase angle of the voltage drop along the line. As the drop along the line changes, the magnitude and phase angle of \pmb{V}_{s} change. The phasor diagram shown in Fig. 9.57 depicts these observations. The dotted phasors represent the pertinent currents and voltages before the addition of the capacitor. Thus, comparing the dotted phasors of \pmb{I},R_{1}\pmb{I}, j \omega L_{1}\pmb{I} and \pmb{V}_{s} with their solid counterparts clearly shows the effect of adding C to the circuit. In particular, note that this reduces the amplitude of the source voltage and still maintains the amplitude of the load voltage. Practically, this result means that, as the load increases (i.e., as \pmb{I}_{a} and \pmb{I}_{b}increase), we can add capacitors to the system (i.e., increase \pmb{I}_{c})so that under heavy load conditions we can maintain \pmb{V}_{L} without increasing the amplitude of the source voltage.