We have an eight-line to three-line priority encoder circuit with D0,D1,D2,D3,D4,D5,D6 and D7 as the data input lines. the output bits are A (MSB), B and C (LSB). Higher-order data bits have been assigned a higher priority, with D7 having the highest priority. If the data inputs and outputs are

Question

We have an eight-line to three-line priority encoder circuit with $D0,D1,D2,D3,D4,D5,D6$ and $D7$ as the data input lines. the output bits are $A (MSB)$ , $B$ and $C (LSB)$ . Higher-order data bits have been assigned a higher priority, with $D7$ having the highest priority. If the data inputs and outputs are active when LOW, determine the logic status of output bits for the following logic status of data inputs:

(a) All inputs are in logic ‘ $0$ ’ state.

(b) $D_{1}$ to $D_{4}$ are in logic ‘ $1$ ’ state and $D_{5}$ to $D_{1}$ are in logic ‘ $0$ ’ state.

(c) $D_{1}$ is in logic ‘ $0$ ’ state. The logic status of the other inputs is not known.

(a) All inputs are in logic ‘[latex]0[/latex]’ state.

(b) [latex]D_{1}[/latex] to [latex]D_{4}[/latex] are in logic ‘[latex]1[/latex]’ state and [latex]D_{5}[/latex] to [latex]D_{1}[/latex] are in logic ‘[latex]0[/latex]’ state.

(c) [latex]D_{1}[/latex] is in logic ‘[latex]0[/latex]’ state. The logic status of the other inputs is not known.

Accepted Answer

(a) Since all inputs are in logic ‘[latex]0[/latex]’ state, it implies that all inputs are active. Since [latex]D_{7}[/latex] has the highest priority and all inputs and outputs are active when LOW, the output bits are [latex]A = 0, B = 0[/latex] and [latex]C = 0[/latex].

(b) Inputs [latex]D_{5}[/latex] to [latex]D_{7}[/latex] are the ones that are active. among these, [latex]D_{7}[/latex] has the highest priority. Therefore, the output bits are[latex] A = 0, B = 0[/latex] and[latex] C = 0[/latex].

(c) [latex]D_{7}[/latex] is active. Since [latex]D_{7}[/latex] has the highest priority, it will be encoded irrespective of the logic status of other inputs. Therefore, the output bits are [latex]A = 0, B = 0[/latex] and C = 0.

Question 8.4: We have an eight-line to three-line priority encoder circuit...

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