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Electric Circuits
CMOS: Circuit Design, Layout, and Simulation
192 SOLVED PROBLEMS
Question: 30.17
Repeat Ex. 30.16 if the comparators switch at 305 mV (a 55 mV offset) and 675 mV ...
Verified Answer:
\begin{aligned} &v_{in} \quad\quad\qua...
Question: 29.10
Design a 3-bit Flash converter, listing the values of the voltages at each resistor tap ...
Verified Answer:
The 3-bit converter can be seen in Fig. 29.22. As ...
Question: 29.11
If a 10-bit Flash converter is designed, determine the maximum offset voltage of the ...
Verified Answer:
Equation (29.48) requires that the offset voltage ...
Question: 29.14
Determine the clock frequency needed to form an 8-bit, single-slope converter, if the ...
Verified Answer:
Since the sampling rate required is 40 kHz, then t...
Question: 29.12
Assume that the two-step ADC shown in Fig. 29.26 has four bits of resolution. Make a ...
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Since
V_{R E F}
was conveniently ma...
Question: 30.20
Repeat Ex. 30.19 if the op-amps used have open-loop gains of 1,000. ...
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The simulation results are shown in Fig. 30.61. Th...
Question: 30.19
Simulate the operation of the circuit shown in Fig. 30.59 (a cascade of Figs. 30.55 ...
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This circuit shows the same mismatched capacitors ...
Question: 30.18
Simulate the operation of the circuit shown in Fig. 30.57. Comment on the ideal ...
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The capacitor values were chosen arbitrarily. The ...
Question: 30.22
Repeat Ex. 30.21 if the common-mode voltage coming out of the op-amp sees an offset of ...
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The differential input and output signals with thi...
Question: 30.21
Simulate the operation of the circuit shown in Fig. 30.66. Show the input and output ...
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The simulation results are shown in Fig. 30.67. No...
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