CMOS: Circuit Design, Layout, and Simulation

192 SOLVED PROBLEMS

Question: 30.17

Verified Answer:

\begin{aligned} &v_{in} \quad\quad\qua...
Question: 29.10

Verified Answer:

The 3-bit converter can be seen in Fig. 29.22. As ...
Question: 29.11

Verified Answer:

Equation (29.48) requires that the offset voltage ...
Question: 29.14

Verified Answer:

Since the sampling rate required is 40 kHz, then t...
Question: 29.12

Verified Answer:

Since V_{R E F} was conveniently ma...
Question: 30.20

Verified Answer:

The simulation results are shown in Fig. 30.61. Th...
Question: 30.19

Verified Answer:

This circuit shows the same mismatched capacitors ...
Question: 30.18

Verified Answer:

The capacitor values were chosen arbitrarily. The ...
Question: 30.22

Verified Answer:

The differential input and output signals with thi...
Question: 30.21

Verified Answer:

The simulation results are shown in Fig. 30.67. No...
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