Pulse and Digital Circuits 1st. Edition by Venkata Rao K., Rama Sudha K., Manmadha Rao G. | 9788131721353 | 8131721353

Digital Electronics

Pulse and Digital Circuits

137 SOLVED PROBLEMS

Question: 11.1

In the circuit shown in Fig. 11.16(a), RL = R1 = 100 kΩ , R2 = 50 kΩ and the signal has a peak value of 20 V. Find (a) A (b) VC(min) (c) Vn(min) (d) Ri when the diodes are ON ...

Verified Answer:

(a)

\ A = \frac{a}{1 + a\frac{R_{1}}{2R_{L}...

Question: 11.2

For the four-diode gate shown in Fig. 11.20(a), RL = R2 = 100 kΩ and R1 = 1 kΩ, Rf = 25 Ω, Vs = 20 V. Calculate (a) A (b) V(min) (c) VC(min) (d) Vn(min) for V = V(min) ...

Verified Answer:

(a) We have:

\ R = \frac{R_{1}R_{2}}{R_{1} ...

Question: 11.3

For the four diode gate shown in Fig. 11.21(a), Vs = 20 V, RL = 200 kΩ , RC = 100 kΩ, Rf = 0.5 kΩ, R = Rs = 1 kΩ. Find Vn(min), A and VC(min). ...

Verified Answer:

(i) From Eq. (11.17),

\ V_{n(min)} = V_{s}[...

Question: 11.4

Consider the following situation in the FET series gate, Vs = ± 2 V, Rs = 100 Ω, RL = 10 kΩ. The FET has the following parameters: VGS(OFF)max = −10 V and RD(ON) = 20 Ω. Calculate the voltage levels of the control signal, ID, error due to RS and error due to RD(ON). ...

Verified Answer:

The control signal should have a value

\ V_{...

Question: 11.5

In the circuit shown in Fig. 11.16(a), RL = R1 = 200 kΩ, R2 = 100 kΩ and the signal has a peak value of 10 V. Find (a) A (b) VC(min) (c) Vn(min) (d) Ri ...

Verified Answer:

(a)

\ A = \frac{α}{1 + α(R_{1}/2R_{L})}[/la...

Question: 11.6

For the four-diode gate shown in Fig 11.20(a), RL = R2 = 50 kΩ and R1 = 1 kΩ, Rf = 25 Ω, Vs = 10 V. Calculate (a) A (b) V(min) (c) VC(min) (d) for V = V(min) ...

Verified Answer:

(a) We have

\ R = \frac{R_{2}R_{1}}{R_{2} +...

Question: 11.7

For the FET series gate shown in Fig. 11.30. Vs = ±1 V, Rs = 50 Ω, RL = 20 kΩ. The FET has the following parameters, VGS(OFF)max = −10 V and RD(ON) = 20 Ω. Calculate the voltage levels of the control signal, ID, error due to RS and error due to RD(ON). ...

Verified Answer:

The control signal should have a value

\ V_{...

Question: 12.1

Design a relaxation oscillator using a UJT, with VV = 3 V, η = 0.68 to 0.82, IP = 2μA, IV = 1 mA, VBB = 20 V, the output frequency is to be 5 kHz. Calculate the typical peak-to-peak output voltage. ...

Verified Answer:

The given UJT has the following parameters: [latex...

Question: 12.2

For the circuit shown in Fig. 12.8, it is given that: VYY = 20 V, VZ1 = 6.8 V, VZ2 = 3.8 V, hrb = 3 × 10^−4, hib = 20Ω, hob = 0.5μmhos, α = 0.98 and RE = 1kΩ. Find the slope error: (a) when RL = ∞ (b) when RL = 200 kΩ and (c) when RL = 50 kΩ. ...

Verified Answer:

\ V_{EE} = V_{Z1} + V_{Z2}

= 6.8 + ...

Question: 12.3

For the Miller’s sweep shown in Fig. 12.12(a), VCC = 25 V, RC2 = 5 kΩ, RC1 = 10 kΩ. The duration of the sweep is 5 ms. The sweep amplitude is 25 V. Calculate (a) the value of C; (b) the retrace time and (c) the slope error. The transistor has the following parameters: hfe = 80, hie = 1kΩ, ...

Verified Answer:

(a)

\ V_{s} = \frac{V_{CC}}{R_{C1}C_{s}} × ...